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LMH1983: Output of PLL3 using Crosspoint Output Selection

masahiko shimizu
Guru 11235 points
Part Number: LMH1983

Hi,

My customer uses OUT2 source by changing Crosspoint Output Selection.
They use PLL2 and PLL3.
When one PLL use, another PLL is disable by setting Crosspoint Output Selection.

They has issue which is incorrect output clock frequency at only changing output PLL2->PLL3.
Output clk frequency of PLL3 is incorrect only beginning from changing PLL.("PLL2_enable PLL3_disable" -> "PLL2_disable PLL3_enable" )
After a short time, PLL3 output clk frequency is correct.
This issue doesn't occur at PLL2("PLL2_disable PLL3_enable" -> "PLL2_enable PLL3_disable" )
and This issue doesn't occur at not disable PLL3.

Is this specification of LMH1983?
Does PLL3 need a lot of time for lock than PLL2?

Best reagrds,
Shimizu

  • 0
    TI__Expert 8865 points
    Hello Shimizu,
    Thanks for contacting us. Your question is assigned to an expert and he will get back to you as soon as possible.
    Best regards
    Puneet
  • 0
    TI__Mastermind 32575 points

    PLL3 needs an initialization before if can operate  correctly (proper duty cycle, jitter performance) after PLL startup/enable.  This is a known characteristic of the device.   Refer to this post for the register init sequence after PLL3 is enabled (e.g. after device powerup, PLL3 disable->enable, or switching crosspoint/PLL mode as in your case).

    Alan