We will be using the DS250DF810 for retiming 25G RX signals between either a QSFP28/SFP25 and a FPGA.
The DS250DF810 has 220pf DC integrated blocking capacitors (AC coupling) on the high speed signals. The QSFP/SPF devices also have integrated AC coupling capacitors on both TX and RX sides. Only the RX side from the QSFP28 to the FPGA is required to be retimed, so my question is, are there any known performance issues or layout restrictions due to the “double” coupling caps present? This would be in the RX path QSFP to retimer. See below.
