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slk2501OC-48 Muti-Rate SONET Transceiver

Nikola Vranic
Prodigy 130 points

Hi, I have a few questions about this chip:

 

  1. Should I send scrambled data to this chip or not (RX side)? And ofcourse is data scrambled for this chip to some other device (TX side)? 
  2. Does this chip send section and line overhead to LVDS ports (one from SLK2501 to FPGA) or only data from SHD/SONET payload?
  3. On test mode, when TESTEN and PRBS_EN are selected, does chip generate PRBSPAS, LOS and LOL signal? On our board, in test mode,  we got some fussy data on LVDS ports (from SLK2501 to FPGA) and  PRBSPAS,LOS and LOL are 0. 

Thank you in advance!

  • 0
    TI__Intellectual 1810 points

    Hi Nikola,

    1. SLK2501 doesn't have scrambler/descrambler function. It doesn't care if the data is scrambled or not. It will be serialized/deserealized as received.

    2. Only frame boundary detection is performed to be able to serialize/desearize correctly. Section and line overhead is sent out.

    3. TESTEN has to be set low (0) always. PRBSEN when asserted high (1), PRBS 2^7-1 data is sent out on serial TX, and PRBSPASS will be low (0) if no PRBS 2^7-1 data is received on serial RX. LOS is asserted high (1) if no signal is received on serial RX. LOL is asserted low (0) if the receiver isn't locked onto incoming serial data. Please see the datasheet (http://focus.ti.com/lit/ds/symlink/slk2501.pdf) for more information.

    Best regards.

    Hassan.

  • 0 in reply to HA
    Prodigy 130 points

    Thank you very much Hassan!