Dear all,
From the technical documents of DS90UH927 "serializer are capable of receiving the clock signal to act as I2S slave and the deserializer...act as I2S master", we know 927 exists as an I2S slave.In my design case ,hope 927 as PDM MIC interface,but I2S bitCLK and WC cannot be generated!(MIC interface need CLK signal as intput)my design shows as below:
Question:
1 can I design as the picture shows?
2 If this solution is available, what I need is a PDM master. Can you recommend one for me ?
Many thanks and looking forward to your reply!!!
