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DS125DF1610: ds125df1610 unlock at 6.144G

cannie chang
Intellectual 910 points
Part Number: DS125DF1610
Other Parts Discussed in Thread: USB2ANY, TLK10232

DS125DF1610: use 312.5Mhz reference clock

When it set to CPRI  mode, it can work well with 9.8304 and 2.4576G can work well.

When I change to CPRI2 mode, 6.144G, it can not lock. tester show rx frequency is 3.2G.

When I change to 3.072G, it will disparity error.

I load ext_10G_config and modify High level page CDR and cross connect option only. Do I need anything else?

  

  • 0
    TI__Mastermind 19235 points

    My suggestions below:

    • if configuring retimer for CPRI2 by setting 0x2F=96 you should make sure that the input data rate to the retimer is either 6.144Gbps or 3.072 Gbps. The retimer implements a ppm counter and thus will not lock to input rate of 3.2Gbps if CDR CPRI2 setting is applied (as PPM tolerance is exceeded.)
    • Try setting channel register 0x64=0xFF

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • 0 in reply to Rodrigo Natal
    Intellectual 910 points

    I use USB2Any to setup it. 0x2F= 0x96 0x64=0xff. it still can not work

    Please check the attach picture. 

    Thanks

  • 0 in reply to cannie chang
    Intellectual 910 points
    sometime test equipment will show rx frequency around 3.3G
  • 0 in reply to cannie chang
    Intellectual 910 points
    How to take care unused differential input?
    thanks
  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    I would suggest to try the following settings to see if they help the channel attain CDR lock

    • Set 0x0C[3]=0
    • Set 0x2F[2]=0
    • Set 0x2F[1]=0

    If the above doesn't help, you may try ref_mode=0 (this mode is only intended for lab debug)

    • 0x36[5:4]=b00

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points
    We recommend differential signaling for real application. For lab test/debug you may leave it floating
  • 0 in reply to Rodrigo Natal
    Intellectual 910 points

    After I set  as below

    • Set 0x0C[3]=0
    • Set 0x2F[2]=0
    • Set 0x2F[1]=0

    device status show CDR lock, but test equipment : receive frequency = 6.28G. somtime one side is OK, otherwise is wrong.

           0x0c =0

           0x2f = 0x90

    add

    • 0x36[5:4]=b00

    device status show CDR lock: test equipment: receiver frequency: one side is 6.28G otherside is 6.33G.

    adapt mode 0 : one side ok, otherside is 6.28

    adapt mode 1 : one side 3.3G other side no frequecy : 

    adapt mode 2: without DFE : sometime can lock both side. sometime not. when it is not, frequency is 3.3G.      with continue DFE  -->  sometime will Ok. I just reset CDR and check

    adapt mode3 : with DFE  it still somtime OK. Sometime fail.

    so, even bypass reference clock, it still will lock to 3.3G. 

     

     

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points
    Hi,

    Do you have other equipment available for generating a high-speed signal at CPRI2 rate? I think part of the result here may be due to the equipment itself and not the retimer.

    Cordially,

    Rodrigo
  • 0 in reply to cannie chang
    Intellectual 910 points
    what is the different between debug and first lock? what function will be impact?
  • 0 in reply to cannie chang
    Intellectual 910 points
    when I just change to debug mode and ref_clk change to 25Mhz. it seem more stable?
    does it will impact locking time or retimer function?
  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    I believe you are referring to ref_mode bits on channel register 0x36. When set to b00 the retimer will incrementally step through every VCO frequency from highest to lowest until the CDR achieves lock 

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points
    For the default ref_mode the CDR is only able to lock to the programmed data rate (e.g. 6.144Gbps/3.072Gbps) plus or minus 100ppm. The fact that CDR is only able to lock in reg_mode 0 suggests that your test equipment may not be outputting data at the correct frequency.
  • 0 in reply to cannie chang
    Intellectual 910 points
    could I run my system at debug mode? datasheet recommend use fast lock mode. Could you tell me what is drawback when I use debug mode?
  • 0 in reply to cannie chang
    Intellectual 910 points
    I my card, I use TLK10232 and DS125DF1610, both 6.144G unstable. could you please help to fix Ds125df1610 need operate at debug mode issue.
    Thanks
  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    The main draw back is that the CDR lock time will be much slower (around 1-2s) versus the 50ms typical CDR lock time you observe with default reference mode. In addition, ppm tolerance is no longer a gate to locking, and thus you lose than check on the data rate accuracy.

    -Rodrigo

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points
    I would recommend that you perform a measurement of your pattern generator test equipment output signal using a scope to verify the data rate.
  • 0 in reply to Rodrigo Natal
    Intellectual 910 points
    when I use test mode, I use eye pattern to check. the eye is open.
  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    This result is encouraging. For a real system however ref_mode = 3 is still our recommended configuration. We are confident based on our retime evaluation that the DS125DF1610 can readily lock to a 6.144Gbps signal while operating in ref_mode =3

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • 0 in reply to Rodrigo Natal
    Intellectual 910 points
    Do you have any suggestion on parameter setting? I can not run at 1 second locking time. I need it less than 50 ms?
    another question: if I break line less than 50ms, does CDR need re-lock? if it is yes, how long?
  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    Have you had an opportunity to verify the data rate for the retime input signal using a sampling scope such as a Keysight DCA? I believe that's the issue here.

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • 0 in reply to cannie chang
    Intellectual 910 points

    please check attach file

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    Thanks for the update and result. The measured data rate looks correc, so my initial hypothesis was incorrect.

    One experiment worth trying would be to program retimer to 6.144Gbps rate via manual mode. You may use the channel register settings below:

    Reg        Value

    2F           36

    36           30

    60           71

    61           BD

    62           71

    63           BD

    64           FF

    67           20          

  • 0 in reply to Rodrigo Natal
    Intellectual 910 points

    Hi,

      This set can make it lock. thanks

    so, that mean I can not use standard rat. I must use manual mode. Am i right?

  • 0 in reply to cannie chang
    Intellectual 910 points
    do you follow table 20 to get value?
    it seem not right
    F1=6144000000
    F2= 192000000
    F3 =192000000*1024/25000000 =7864.32 =7864 = 0x1EB8
    but your value is 71BD
    could you explain how to calculate it?
    Thanks
  • 0 in reply to cannie chang
    Intellectual 910 points

    Hi,

       I can set it up for 9.8 6.144 3.072 2.45G. they work ok. But, it will fail for 1.25G.

       60= 00 61= b2 62=00 63=b2  64 =ff 67=20

       base on 1.25 x8 =10G to calculate. 

      anything wrong?

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    Your register values are correct. You may try the following additional steps:

    • Disable SBT function by setting 0x0C[3]=0
    • Force divide by 8 setting using channel register write operations below:

    REG       Value    Mask     Comment

    18           30           70           //Select Divide by 8

    9             04           04           //Enable divsel override

    Cordially,

    Rodrigo

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points
    Refer to the product datasheet for instructions.

    Cordially,
    Rodrigo Natal
  • 0 in reply to Rodrigo Natal
    Intellectual 910 points
    1.25G OK. Thanks
    when I broke line and recovery at 50ms, does your CDR will re-lock?
    I need switch time less than 50 me, if your CDR re-lock. it will take too long.
    Br,
  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    For default retimer setting the worst case CDR lock time is 100ms. You may reduce the CDR lock time by either:

    1. reducing the EOM_timer_threshold setting via channel register 0x2A
    2. Setting the HEO and VEO lock thresholds to 0 via channel register 0x6A

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • 0 in reply to Rodrigo Natal
    Intellectual 910 points

    hi,

       for DS125DF1610, It seem use Fast_lock all cap dac ref still not stable. I will use debug mode. it seem can work. Now, I have issue for 1.25G work with TLK10232.

    tlk10232 --> it always show 8b/10b error. but datapath is Ok

    00: 0E10 342E 8155 AB4F 1540 2000 F114 0000
    08: 0000 0380 4000 0D10 0371 2F80 0000 1F1B
    10: FFFF FFFF FFFF FFFF FFFF 0C01 F000 2000
    18: 0C20 2500 4C20 1020 0000 3000 0000 0000

    00: 0E10 342E 8155 AB4F 1540 2000 F114 0000
    08: 0000 0380 4000 0D10 0371 2F80 0000 1F0B
    10: FFFF 0000 FFFF FFFF FFFF 0141 F000 2000
    18: 0C20 2500 4C20 1020 0000 3000 0000 0000

    ds125  --> I try to add pre-cursor or post-curosr. All fail.   But ethernet phy  optical interface to TLk10232 LS is OK. I measure waveform, both are OK.

    0x0 Shared Registers_0x00 00
    0x1 Shared Registers_0x01 71
    0x2 Shared Registers_0x02 40
    0x3 Shared Registers_0x03 00
    0x4 Shared Registers_0x04 01
    0x5 Shared Registers_0x05 08
    0x6 Shared Registers_0x06 00
    0x7 Shared Registers_0x07 05
    0x8 Shared Registers_0x08 00
    0x9 Shared Registers_0x09 00
    0xA Shared Registers_0x0A 01
    0xB Shared Registers_0x0B 40
    0xC Shared Registers_0x0C 00
    0xD Shared Registers_0x0D E0
    0xE Shared Registers_0x0E 01
    0xF Shared Registers_0x0F FF
    0x10 Shared Registers_0x10 FF
    0x11 Shared Registers_0x11 00
    0xFC Global Registers_0xFC 01
    0xFD Global Registers_0xFD 00
    0xFE Global Registers_0xFE 03
    0xFF Global Registers_0xFF 00

    0x0 Rx/Tx 6A_0x00 00
    0x1 Rx/Tx 6A_0x01 80
    0x2 Rx/Tx 6A_0x02 DC
    0x3 Rx/Tx 6A_0x03 00
    0x4 Rx/Tx 6A_0x04 01
    0x5 Rx/Tx 6A_0x05 01
    0x6 Rx/Tx 6A_0x06 01
    0x7 Rx/Tx 6A_0x07 01
    0x8 Rx/Tx 6A_0x08 60
    0x9 Rx/Tx 6A_0x09 04
    0xA Rx/Tx 6A_0x0A 50
    0xB Rx/Tx 6A_0x0B 6F
    0xC Rx/Tx 6A_0x0C 08
    0xD Rx/Tx 6A_0x0D B4
    0xE Rx/Tx 6A_0x0E 93
    0xF Rx/Tx 6A_0x0F 69
    0x10 Rx/Tx 6A_0x10 3A
    0x11 Rx/Tx 6A_0x11 20
    0x12 Rx/Tx 6A_0x12 E0
    0x13 Rx/Tx 6A_0x13 90
    0x14 Rx/Tx 6A_0x14 00
    0x15 Rx/Tx 6A_0x15 13
    0x16 Rx/Tx 6A_0x16 7A
    0x17 Rx/Tx 6A_0x17 36
    0x18 Rx/Tx 6A_0x18 30
    0x19 Rx/Tx 6A_0x19 20
    0x1A Rx/Tx 6A_0x1A A0
    0x1B Rx/Tx 6A_0x1B 03
    0x1C Rx/Tx 6A_0x1C 90
    0x1D Rx/Tx 6A_0x1D 00
    0x1E Rx/Tx 6A_0x1E E1
    0x1F Rx/Tx 6A_0x1F 55
    0x20 Rx/Tx 6A_0x20 00
    0x21 Rx/Tx 6A_0x21 00
    0x22 Rx/Tx 6A_0x22 00
    0x23 Rx/Tx 6A_0x23 41
    0x24 Rx/Tx 6A_0x24 00
    0x25 Rx/Tx 6A_0x25 01
    0x26 Rx/Tx 6A_0x26 77
    0x27 Rx/Tx 6A_0x27 3E
    0x28 Rx/Tx 6A_0x28 B8
    0x29 Rx/Tx 6A_0x29 60
    0x2A Rx/Tx 6A_0x2A 30
    0x2B Rx/Tx 6A_0x2B 0F
    0x2C Rx/Tx 6A_0x2C F2
    0x2D Rx/Tx 6A_0x2D 01
    0x2E Rx/Tx 6A_0x2E 00
    0x2F Rx/Tx 6A_0x2F 36
    0x30 Rx/Tx 6A_0x30 00
    0x31 Rx/Tx 6A_0x31 20
    0x32 Rx/Tx 6A_0x32 11
    0x33 Rx/Tx 6A_0x33 88
    0x34 Rx/Tx 6A_0x34 BF
    0x35 Rx/Tx 6A_0x35 1F
    0x36 Rx/Tx 6A_0x36 30
    0x37 Rx/Tx 6A_0x37 00
    0x38 Rx/Tx 6A_0x38 10
    0x39 Rx/Tx 6A_0x39 00
    0x3A Rx/Tx 6A_0x3A 00
    0x3B Rx/Tx 6A_0x3B 32
    0x3C Rx/Tx 6A_0x3C 00
    0x3D Rx/Tx 6A_0x3D 28
    0x3E Rx/Tx 6A_0x3E 00
    0x3F Rx/Tx 6A_0x3F C1
    0x40 Rx/Tx 6A_0x40 00
    0x41 Rx/Tx 6A_0x41 01
    0x42 Rx/Tx 6A_0x42 04
    0x43 Rx/Tx 6A_0x43 10
    0x44 Rx/Tx 6A_0x44 40
    0x45 Rx/Tx 6A_0x45 08
    0x46 Rx/Tx 6A_0x46 02
    0x47 Rx/Tx 6A_0x47 80
    0x48 Rx/Tx 6A_0x48 03
    0x49 Rx/Tx 6A_0x49 0C
    0x4A Rx/Tx 6A_0x4A 30
    0x4B Rx/Tx 6A_0x4B 41
    0x4C Rx/Tx 6A_0x4C 50
    0x4D Rx/Tx 6A_0x4D C0
    0x4E Rx/Tx 6A_0x4E 60
    0x4F Rx/Tx 6A_0x4F 90
    0x50 Rx/Tx 6A_0x50 88
    0x51 Rx/Tx 6A_0x51 82
    0x52 Rx/Tx 6A_0x52 A0
    0x53 Rx/Tx 6A_0x53 46
    0x54 Rx/Tx 6A_0x54 52
    0x55 Rx/Tx 6A_0x55 8C
    0x56 Rx/Tx 6A_0x56 B0
    0x57 Rx/Tx 6A_0x57 C8
    0x58 Rx/Tx 6A_0x58 57
    0x59 Rx/Tx 6A_0x59 5D
    0x5A Rx/Tx 6A_0x5A 69
    0x5B Rx/Tx 6A_0x5B 75
    0x5C Rx/Tx 6A_0x5C D5
    0x5D Rx/Tx 6A_0x5D 99
    0x5E Rx/Tx 6A_0x5E 96
    0x5F Rx/Tx 6A_0x5F A5
    0x60 Rx/Tx 6A_0x60 00
    0x61 Rx/Tx 6A_0x61 B2
    0x62 Rx/Tx 6A_0x62 00
    0x63 Rx/Tx 6A_0x63 B2
    0x64 Rx/Tx 6A_0x64 DD
    0x65 Rx/Tx 6A_0x65 00
    0x66 Rx/Tx 6A_0x66 00
    0x67 Rx/Tx 6A_0x67 20
    0x68 Rx/Tx 6A_0x68 00
    0x69 Rx/Tx 6A_0x69 0A
    0x6A Rx/Tx 6A_0x6A 22
    0x6B Rx/Tx 6A_0x6B 40
    0x6C Rx/Tx 6A_0x6C 00
    0x6D Rx/Tx 6A_0x6D 00
    0x6E Rx/Tx 6A_0x6E 00
    0x6F Rx/Tx 6A_0x6F 00
    0x70 Rx/Tx 6A_0x70 03
    0x71 Rx/Tx 6A_0x71 20
    0x72 Rx/Tx 6A_0x72 00
    0x73 Rx/Tx 6A_0x73 00
    0x74 Rx/Tx 6A_0x74 00
    0x75 Rx/Tx 6A_0x75 00
    0x76 Rx/Tx 6A_0x76 22
    0x77 Rx/Tx 6A_0x77 1A
    0x78 Rx/Tx 6A_0x78 30
    0x79 Rx/Tx 6A_0x79 10
    0x7A Rx/Tx 6A_0x7A 00
    0x7B Rx/Tx 6A_0x7B 00
    0x7C Rx/Tx 6A_0x7C 00
    0x7D Rx/Tx 6A_0x7D 48
    0x7E Rx/Tx 6A_0x7E 13
    0x7F Rx/Tx 6A_0x7F 3A
    0x80 Rx/Tx 6A_0x80 3B
    0x81 Rx/Tx 6A_0x81 E4
    0x82 Rx/Tx 6A_0x82 00
    0x83 Rx/Tx 6A_0x83 00
    0x84 Rx/Tx 6A_0x84 00
    0x85 Rx/Tx 6A_0x85 00
    0x86 Rx/Tx 6A_0x86 00
    0x87 Rx/Tx 6A_0x87 00
    0x88 Rx/Tx 6A_0x88 00
    0x89 Rx/Tx 6A_0x89 00
    0x8A Rx/Tx 6A_0x8A 2F
    0x8B Rx/Tx 6A_0x8B 00
    0x8C Rx/Tx 6A_0x8C 00
    0x8D Rx/Tx 6A_0x8D 02
    0x8E Rx/Tx 6A_0x8E 1C
    0x8F Rx/Tx 6A_0x8F 00
    0x90 Rx/Tx 6A_0x90 00
    0x91 Rx/Tx 6A_0x91 00
    0x92 Rx/Tx 6A_0x92 00
    0x93 Rx/Tx 6A_0x93 00
    0x94 Rx/Tx 6A_0x94 00
    0x95 Rx/Tx 6A_0x95 00
    0x96 Rx/Tx 6A_0x96 1E
    0x97 Rx/Tx 6A_0x97 00
    0x98 Rx/Tx 6A_0x98 0C
    0x99 Rx/Tx 6A_0x99 3F
    0x9A Rx/Tx 6A_0x9A 3F
    0x9B Rx/Tx 6A_0x9B 02
    0x0 Rx/Tx 6B_0x00 00
    0x1 Rx/Tx 6B_0x01 80
    0x2 Rx/Tx 6B_0x02 DC
    0x3 Rx/Tx 6B_0x03 00
    0x4 Rx/Tx 6B_0x04 01
    0x5 Rx/Tx 6B_0x05 01
    0x6 Rx/Tx 6B_0x06 01
    0x7 Rx/Tx 6B_0x07 01
    0x8 Rx/Tx 6B_0x08 60
    0x9 Rx/Tx 6B_0x09 04
    0xA Rx/Tx 6B_0x0A 50
    0xB Rx/Tx 6B_0x0B 6F
    0xC Rx/Tx 6B_0x0C 08
    0xD Rx/Tx 6B_0x0D B4
    0xE Rx/Tx 6B_0x0E 93
    0xF Rx/Tx 6B_0x0F 69
    0x10 Rx/Tx 6B_0x10 3A
    0x11 Rx/Tx 6B_0x11 20
    0x12 Rx/Tx 6B_0x12 E0
    0x13 Rx/Tx 6B_0x13 90
    0x14 Rx/Tx 6B_0x14 00
    0x15 Rx/Tx 6B_0x15 13
    0x16 Rx/Tx 6B_0x16 7A
    0x17 Rx/Tx 6B_0x17 36
    0x18 Rx/Tx 6B_0x18 30
    0x19 Rx/Tx 6B_0x19 20
    0x1A Rx/Tx 6B_0x1A A0
    0x1B Rx/Tx 6B_0x1B 03
    0x1C Rx/Tx 6B_0x1C 90
    0x1D Rx/Tx 6B_0x1D 00
    0x1E Rx/Tx 6B_0x1E E1
    0x1F Rx/Tx 6B_0x1F 55
    0x20 Rx/Tx 6B_0x20 00
    0x21 Rx/Tx 6B_0x21 00
    0x22 Rx/Tx 6B_0x22 00
    0x23 Rx/Tx 6B_0x23 41
    0x24 Rx/Tx 6B_0x24 00
    0x25 Rx/Tx 6B_0x25 00
    0x26 Rx/Tx 6B_0x26 48
    0x27 Rx/Tx 6B_0x27 3E
    0x28 Rx/Tx 6B_0x28 B0
    0x29 Rx/Tx 6B_0x29 60
    0x2A Rx/Tx 6B_0x2A 30
    0x2B Rx/Tx 6B_0x2B 0F
    0x2C Rx/Tx 6B_0x2C F2
    0x2D Rx/Tx 6B_0x2D 01
    0x2E Rx/Tx 6B_0x2E 00
    0x2F Rx/Tx 6B_0x2F 36
    0x30 Rx/Tx 6B_0x30 00
    0x31 Rx/Tx 6B_0x31 20
    0x32 Rx/Tx 6B_0x32 11
    0x33 Rx/Tx 6B_0x33 88
    0x34 Rx/Tx 6B_0x34 BF
    0x35 Rx/Tx 6B_0x35 1F
    0x36 Rx/Tx 6B_0x36 30
    0x37 Rx/Tx 6B_0x37 00
    0x38 Rx/Tx 6B_0x38 10
    0x39 Rx/Tx 6B_0x39 00
    0x3A Rx/Tx 6B_0x3A 00
    0x3B Rx/Tx 6B_0x3B 32
    0x3C Rx/Tx 6B_0x3C 00
    0x3D Rx/Tx 6B_0x3D 28
    0x3E Rx/Tx 6B_0x3E 00
    0x3F Rx/Tx 6B_0x3F C1
    0x40 Rx/Tx 6B_0x40 00
    0x41 Rx/Tx 6B_0x41 01
    0x42 Rx/Tx 6B_0x42 04
    0x43 Rx/Tx 6B_0x43 10
    0x44 Rx/Tx 6B_0x44 40
    0x45 Rx/Tx 6B_0x45 08
    0x46 Rx/Tx 6B_0x46 02
    0x47 Rx/Tx 6B_0x47 80
    0x48 Rx/Tx 6B_0x48 03
    0x49 Rx/Tx 6B_0x49 0C
    0x4A Rx/Tx 6B_0x4A 30
    0x4B Rx/Tx 6B_0x4B 41
    0x4C Rx/Tx 6B_0x4C 50
    0x4D Rx/Tx 6B_0x4D C0
    0x4E Rx/Tx 6B_0x4E 60
    0x4F Rx/Tx 6B_0x4F 90
    0x50 Rx/Tx 6B_0x50 88
    0x51 Rx/Tx 6B_0x51 82
    0x52 Rx/Tx 6B_0x52 A0
    0x53 Rx/Tx 6B_0x53 46
    0x54 Rx/Tx 6B_0x54 52
    0x55 Rx/Tx 6B_0x55 8C
    0x56 Rx/Tx 6B_0x56 B0
    0x57 Rx/Tx 6B_0x57 C8
    0x58 Rx/Tx 6B_0x58 57
    0x59 Rx/Tx 6B_0x59 5D
    0x5A Rx/Tx 6B_0x5A 69
    0x5B Rx/Tx 6B_0x5B 75
    0x5C Rx/Tx 6B_0x5C D5
    0x5D Rx/Tx 6B_0x5D 99
    0x5E Rx/Tx 6B_0x5E 96
    0x5F Rx/Tx 6B_0x5F A5
    0x60 Rx/Tx 6B_0x60 00
    0x61 Rx/Tx 6B_0x61 B2
    0x62 Rx/Tx 6B_0x62 00
    0x63 Rx/Tx 6B_0x63 B2
    0x64 Rx/Tx 6B_0x64 DD
    0x65 Rx/Tx 6B_0x65 00
    0x66 Rx/Tx 6B_0x66 00
    0x67 Rx/Tx 6B_0x67 20
    0x68 Rx/Tx 6B_0x68 00
    0x69 Rx/Tx 6B_0x69 0A
    0x6A Rx/Tx 6B_0x6A 22
    0x6B Rx/Tx 6B_0x6B 40
    0x6C Rx/Tx 6B_0x6C 00
    0x6D Rx/Tx 6B_0x6D 00
    0x6E Rx/Tx 6B_0x6E 00
    0x6F Rx/Tx 6B_0x6F 00
    0x70 Rx/Tx 6B_0x70 03
    0x71 Rx/Tx 6B_0x71 20
    0x72 Rx/Tx 6B_0x72 00
    0x73 Rx/Tx 6B_0x73 00
    0x74 Rx/Tx 6B_0x74 00
    0x75 Rx/Tx 6B_0x75 00
    0x76 Rx/Tx 6B_0x76 22
    0x77 Rx/Tx 6B_0x77 1A
    0x78 Rx/Tx 6B_0x78 30
    0x79 Rx/Tx 6B_0x79 10
    0x7A Rx/Tx 6B_0x7A 00
    0x7B Rx/Tx 6B_0x7B 00
    0x7C Rx/Tx 6B_0x7C 00
    0x7D Rx/Tx 6B_0x7D 48
    0x7E Rx/Tx 6B_0x7E 13
    0x7F Rx/Tx 6B_0x7F 3A
    0x80 Rx/Tx 6B_0x80 3B
    0x81 Rx/Tx 6B_0x81 E4
    0x82 Rx/Tx 6B_0x82 00
    0x83 Rx/Tx 6B_0x83 01
    0x84 Rx/Tx 6B_0x84 00
    0x85 Rx/Tx 6B_0x85 00
    0x86 Rx/Tx 6B_0x86 00
    0x87 Rx/Tx 6B_0x87 00
    0x88 Rx/Tx 6B_0x88 02
    0x89 Rx/Tx 6B_0x89 00
    0x8A Rx/Tx 6B_0x8A 34
    0x8B Rx/Tx 6B_0x8B 00
    0x8C Rx/Tx 6B_0x8C 00
    0x8D Rx/Tx 6B_0x8D 02
    0x8E Rx/Tx 6B_0x8E 1C
    0x8F Rx/Tx 6B_0x8F 00
    0x90 Rx/Tx 6B_0x90 00
    0x91 Rx/Tx 6B_0x91 00
    0x92 Rx/Tx 6B_0x92 00
    0x93 Rx/Tx 6B_0x93 00
    0x94 Rx/Tx 6B_0x94 00
    0x95 Rx/Tx 6B_0x95 00
    0x96 Rx/Tx 6B_0x96 1D
    0x97 Rx/Tx 6B_0x97 00
    0x98 Rx/Tx 6B_0x98 0C
    0x99 Rx/Tx 6B_0x99 3F
    0x9A Rx/Tx 6B_0x9A 3F
    0x9B Rx/Tx 6B_0x9B 01
    0x0 Rx/Tx 7A_0x00 00
    0x1 Rx/Tx 7A_0x01 80
    0x2 Rx/Tx 7A_0x02 DC
    0x3 Rx/Tx 7A_0x03 00
    0x4 Rx/Tx 7A_0x04 01
    0x5 Rx/Tx 7A_0x05 01
    0x6 Rx/Tx 7A_0x06 01
    0x7 Rx/Tx 7A_0x07 01
    0x8 Rx/Tx 7A_0x08 60
    0x9 Rx/Tx 7A_0x09 04
    0xA Rx/Tx 7A_0x0A 50
    0xB Rx/Tx 7A_0x0B 6F
    0xC Rx/Tx 7A_0x0C 08
    0xD Rx/Tx 7A_0x0D B4
    0xE Rx/Tx 7A_0x0E 93
    0xF Rx/Tx 7A_0x0F 69
    0x10 Rx/Tx 7A_0x10 3A
    0x11 Rx/Tx 7A_0x11 20
    0x12 Rx/Tx 7A_0x12 E0
    0x13 Rx/Tx 7A_0x13 90
    0x14 Rx/Tx 7A_0x14 00
    0x15 Rx/Tx 7A_0x15 13
    0x16 Rx/Tx 7A_0x16 7A
    0x17 Rx/Tx 7A_0x17 36
    0x18 Rx/Tx 7A_0x18 30
    0x19 Rx/Tx 7A_0x19 20
    0x1A Rx/Tx 7A_0x1A A0
    0x1B Rx/Tx 7A_0x1B 03
    0x1C Rx/Tx 7A_0x1C 90
    0x1D Rx/Tx 7A_0x1D 00
    0x1E Rx/Tx 7A_0x1E E1
    0x1F Rx/Tx 7A_0x1F 55
    0x20 Rx/Tx 7A_0x20 00
    0x21 Rx/Tx 7A_0x21 00
    0x22 Rx/Tx 7A_0x22 00
    0x23 Rx/Tx 7A_0x23 41
    0x24 Rx/Tx 7A_0x24 00
    0x25 Rx/Tx 7A_0x25 00
    0x26 Rx/Tx 7A_0x26 51
    0x27 Rx/Tx 7A_0x27 3A
    0x28 Rx/Tx 7A_0x28 AB
    0x29 Rx/Tx 7A_0x29 40
    0x2A Rx/Tx 7A_0x2A 30
    0x2B Rx/Tx 7A_0x2B 0F
    0x2C Rx/Tx 7A_0x2C F2
    0x2D Rx/Tx 7A_0x2D 01
    0x2E Rx/Tx 7A_0x2E 00
    0x2F Rx/Tx 7A_0x2F 36
    0x30 Rx/Tx 7A_0x30 00
    0x31 Rx/Tx 7A_0x31 20
    0x32 Rx/Tx 7A_0x32 11
    0x33 Rx/Tx 7A_0x33 88
    0x34 Rx/Tx 7A_0x34 BF
    0x35 Rx/Tx 7A_0x35 1F
    0x36 Rx/Tx 7A_0x36 30
    0x37 Rx/Tx 7A_0x37 00
    0x38 Rx/Tx 7A_0x38 10
    0x39 Rx/Tx 7A_0x39 00
    0x3A Rx/Tx 7A_0x3A 00
    0x3B Rx/Tx 7A_0x3B 32
    0x3C Rx/Tx 7A_0x3C 00
    0x3D Rx/Tx 7A_0x3D 28
    0x3E Rx/Tx 7A_0x3E 00
    0x3F Rx/Tx 7A_0x3F C1
    0x40 Rx/Tx 7A_0x40 00
    0x41 Rx/Tx 7A_0x41 01
    0x42 Rx/Tx 7A_0x42 04
    0x43 Rx/Tx 7A_0x43 10
    0x44 Rx/Tx 7A_0x44 40
    0x45 Rx/Tx 7A_0x45 08
    0x46 Rx/Tx 7A_0x46 02
    0x47 Rx/Tx 7A_0x47 80
    0x48 Rx/Tx 7A_0x48 03
    0x49 Rx/Tx 7A_0x49 0C
    0x4A Rx/Tx 7A_0x4A 30
    0x4B Rx/Tx 7A_0x4B 41
    0x4C Rx/Tx 7A_0x4C 50
    0x4D Rx/Tx 7A_0x4D C0
    0x4E Rx/Tx 7A_0x4E 60
    0x4F Rx/Tx 7A_0x4F 90
    0x50 Rx/Tx 7A_0x50 88
    0x51 Rx/Tx 7A_0x51 82
    0x52 Rx/Tx 7A_0x52 A0
    0x53 Rx/Tx 7A_0x53 46
    0x54 Rx/Tx 7A_0x54 52
    0x55 Rx/Tx 7A_0x55 8C
    0x56 Rx/Tx 7A_0x56 B0
    0x57 Rx/Tx 7A_0x57 C8
    0x58 Rx/Tx 7A_0x58 57
    0x59 Rx/Tx 7A_0x59 5D
    0x5A Rx/Tx 7A_0x5A 69
    0x5B Rx/Tx 7A_0x5B 75
    0x5C Rx/Tx 7A_0x5C D5
    0x5D Rx/Tx 7A_0x5D 99
    0x5E Rx/Tx 7A_0x5E 96
    0x5F Rx/Tx 7A_0x5F A5
    0x60 Rx/Tx 7A_0x60 00
    0x61 Rx/Tx 7A_0x61 B2
    0x62 Rx/Tx 7A_0x62 00
    0x63 Rx/Tx 7A_0x63 B2
    0x64 Rx/Tx 7A_0x64 DD
    0x65 Rx/Tx 7A_0x65 00
    0x66 Rx/Tx 7A_0x66 00
    0x67 Rx/Tx 7A_0x67 20
    0x68 Rx/Tx 7A_0x68 00
    0x69 Rx/Tx 7A_0x69 0A
    0x6A Rx/Tx 7A_0x6A 22
    0x6B Rx/Tx 7A_0x6B 40
    0x6C Rx/Tx 7A_0x6C 00
    0x6D Rx/Tx 7A_0x6D 00
    0x6E Rx/Tx 7A_0x6E 00
    0x6F Rx/Tx 7A_0x6F 00
    0x70 Rx/Tx 7A_0x70 03
    0x71 Rx/Tx 7A_0x71 20
    0x72 Rx/Tx 7A_0x72 00
    0x73 Rx/Tx 7A_0x73 00
    0x74 Rx/Tx 7A_0x74 00
    0x75 Rx/Tx 7A_0x75 00
    0x76 Rx/Tx 7A_0x76 22
    0x77 Rx/Tx 7A_0x77 1A
    0x78 Rx/Tx 7A_0x78 30
    0x79 Rx/Tx 7A_0x79 10
    0x7A Rx/Tx 7A_0x7A 00
    0x7B Rx/Tx 7A_0x7B 00
    0x7C Rx/Tx 7A_0x7C 00
    0x7D Rx/Tx 7A_0x7D 48
    0x7E Rx/Tx 7A_0x7E 13
    0x7F Rx/Tx 7A_0x7F 3A
    0x80 Rx/Tx 7A_0x80 00
    0x81 Rx/Tx 7A_0x81 E4
    0x82 Rx/Tx 7A_0x82 00
    0x83 Rx/Tx 7A_0x83 01
    0x84 Rx/Tx 7A_0x84 BA
    0x85 Rx/Tx 7A_0x85 00
    0x86 Rx/Tx 7A_0x86 00
    0x87 Rx/Tx 7A_0x87 00
    0x88 Rx/Tx 7A_0x88 00
    0x89 Rx/Tx 7A_0x89 00
    0x8A Rx/Tx 7A_0x8A 1A
    0x8B Rx/Tx 7A_0x8B 00
    0x8C Rx/Tx 7A_0x8C 00
    0x8D Rx/Tx 7A_0x8D 02
    0x8E Rx/Tx 7A_0x8E 1C
    0x8F Rx/Tx 7A_0x8F 00
    0x90 Rx/Tx 7A_0x90 00
    0x91 Rx/Tx 7A_0x91 00
    0x92 Rx/Tx 7A_0x92 00
    0x93 Rx/Tx 7A_0x93 00
    0x94 Rx/Tx 7A_0x94 00
    0x95 Rx/Tx 7A_0x95 00
    0x96 Rx/Tx 7A_0x96 1C
    0x97 Rx/Tx 7A_0x97 00
    0x98 Rx/Tx 7A_0x98 0C
    0x99 Rx/Tx 7A_0x99 3F
    0x9A Rx/Tx 7A_0x9A 3F
    0x9B Rx/Tx 7A_0x9B 00
    0x0 Rx/Tx 7B_0x00 00
    0x1 Rx/Tx 7B_0x01 80
    0x2 Rx/Tx 7B_0x02 DC
    0x3 Rx/Tx 7B_0x03 00
    0x4 Rx/Tx 7B_0x04 01
    0x5 Rx/Tx 7B_0x05 01
    0x6 Rx/Tx 7B_0x06 01
    0x7 Rx/Tx 7B_0x07 01
    0x8 Rx/Tx 7B_0x08 60
    0x9 Rx/Tx 7B_0x09 04
    0xA Rx/Tx 7B_0x0A 50
    0xB Rx/Tx 7B_0x0B 6F
    0xC Rx/Tx 7B_0x0C 08
    0xD Rx/Tx 7B_0x0D B4
    0xE Rx/Tx 7B_0x0E 93
    0xF Rx/Tx 7B_0x0F 69
    0x10 Rx/Tx 7B_0x10 3A
    0x11 Rx/Tx 7B_0x11 20
    0x12 Rx/Tx 7B_0x12 E0
    0x13 Rx/Tx 7B_0x13 90
    0x14 Rx/Tx 7B_0x14 00
    0x15 Rx/Tx 7B_0x15 13
    0x16 Rx/Tx 7B_0x16 7A
    0x17 Rx/Tx 7B_0x17 36
    0x18 Rx/Tx 7B_0x18 30
    0x19 Rx/Tx 7B_0x19 20
    0x1A Rx/Tx 7B_0x1A A0
    0x1B Rx/Tx 7B_0x1B 03
    0x1C Rx/Tx 7B_0x1C 90
    0x1D Rx/Tx 7B_0x1D 00
    0x1E Rx/Tx 7B_0x1E E1
    0x1F Rx/Tx 7B_0x1F 55
    0x20 Rx/Tx 7B_0x20 00
    0x21 Rx/Tx 7B_0x21 00
    0x22 Rx/Tx 7B_0x22 00
    0x23 Rx/Tx 7B_0x23 41
    0x24 Rx/Tx 7B_0x24 00
    0x25 Rx/Tx 7B_0x25 00
    0x26 Rx/Tx 7B_0x26 64
    0x27 Rx/Tx 7B_0x27 3A
    0x28 Rx/Tx 7B_0x28 B0
    0x29 Rx/Tx 7B_0x29 60
    0x2A Rx/Tx 7B_0x2A 30
    0x2B Rx/Tx 7B_0x2B 0F
    0x2C Rx/Tx 7B_0x2C F2
    0x2D Rx/Tx 7B_0x2D 01
    0x2E Rx/Tx 7B_0x2E 00
    0x2F Rx/Tx 7B_0x2F 36
    0x30 Rx/Tx 7B_0x30 00
    0x31 Rx/Tx 7B_0x31 20
    0x32 Rx/Tx 7B_0x32 11
    0x33 Rx/Tx 7B_0x33 88
    0x34 Rx/Tx 7B_0x34 BF
    0x35 Rx/Tx 7B_0x35 1F
    0x36 Rx/Tx 7B_0x36 30
    0x37 Rx/Tx 7B_0x37 00
    0x38 Rx/Tx 7B_0x38 10
    0x39 Rx/Tx 7B_0x39 00
    0x3A Rx/Tx 7B_0x3A 00
    0x3B Rx/Tx 7B_0x3B 32
    0x3C Rx/Tx 7B_0x3C 00
    0x3D Rx/Tx 7B_0x3D 28
    0x3E Rx/Tx 7B_0x3E 00
    0x3F Rx/Tx 7B_0x3F C1
    0x40 Rx/Tx 7B_0x40 00
    0x41 Rx/Tx 7B_0x41 01
    0x42 Rx/Tx 7B_0x42 04
    0x43 Rx/Tx 7B_0x43 10
    0x44 Rx/Tx 7B_0x44 40
    0x45 Rx/Tx 7B_0x45 08
    0x46 Rx/Tx 7B_0x46 02
    0x47 Rx/Tx 7B_0x47 80
    0x48 Rx/Tx 7B_0x48 03
    0x49 Rx/Tx 7B_0x49 0C
    0x4A Rx/Tx 7B_0x4A 30
    0x4B Rx/Tx 7B_0x4B 41
    0x4C Rx/Tx 7B_0x4C 50
    0x4D Rx/Tx 7B_0x4D C0
    0x4E Rx/Tx 7B_0x4E 60
    0x4F Rx/Tx 7B_0x4F 90
    0x50 Rx/Tx 7B_0x50 88
    0x51 Rx/Tx 7B_0x51 82
    0x52 Rx/Tx 7B_0x52 A0
    0x53 Rx/Tx 7B_0x53 46
    0x54 Rx/Tx 7B_0x54 52
    0x55 Rx/Tx 7B_0x55 8C
    0x56 Rx/Tx 7B_0x56 B0
    0x57 Rx/Tx 7B_0x57 C8
    0x58 Rx/Tx 7B_0x58 57
    0x59 Rx/Tx 7B_0x59 5D
    0x5A Rx/Tx 7B_0x5A 69
    0x5B Rx/Tx 7B_0x5B 75
    0x5C Rx/Tx 7B_0x5C D5
    0x5D Rx/Tx 7B_0x5D 99
    0x5E Rx/Tx 7B_0x5E 96
    0x5F Rx/Tx 7B_0x5F A5
    0x60 Rx/Tx 7B_0x60 00
    0x61 Rx/Tx 7B_0x61 B2
    0x62 Rx/Tx 7B_0x62 00
    0x63 Rx/Tx 7B_0x63 B2
    0x64 Rx/Tx 7B_0x64 DD
    0x65 Rx/Tx 7B_0x65 00
    0x66 Rx/Tx 7B_0x66 00
    0x67 Rx/Tx 7B_0x67 20
    0x68 Rx/Tx 7B_0x68 00
    0x69 Rx/Tx 7B_0x69 0A
    0x6A Rx/Tx 7B_0x6A 22
    0x6B Rx/Tx 7B_0x6B 40
    0x6C Rx/Tx 7B_0x6C 00
    0x6D Rx/Tx 7B_0x6D 00
    0x6E Rx/Tx 7B_0x6E 00
    0x6F Rx/Tx 7B_0x6F 00
    0x70 Rx/Tx 7B_0x70 03
    0x71 Rx/Tx 7B_0x71 20
    0x72 Rx/Tx 7B_0x72 00
    0x73 Rx/Tx 7B_0x73 00
    0x74 Rx/Tx 7B_0x74 00
    0x75 Rx/Tx 7B_0x75 00
    0x76 Rx/Tx 7B_0x76 22
    0x77 Rx/Tx 7B_0x77 1A
    0x78 Rx/Tx 7B_0x78 30
    0x79 Rx/Tx 7B_0x79 10
    0x7A Rx/Tx 7B_0x7A 00
    0x7B Rx/Tx 7B_0x7B 00
    0x7C Rx/Tx 7B_0x7C 00
    0x7D Rx/Tx 7B_0x7D 48
    0x7E Rx/Tx 7B_0x7E 13
    0x7F Rx/Tx 7B_0x7F 3A
    0x80 Rx/Tx 7B_0x80 3C
    0x81 Rx/Tx 7B_0x81 E4
    0x82 Rx/Tx 7B_0x82 00
    0x83 Rx/Tx 7B_0x83 00
    0x84 Rx/Tx 7B_0x84 00
    0x85 Rx/Tx 7B_0x85 00
    0x86 Rx/Tx 7B_0x86 00
    0x87 Rx/Tx 7B_0x87 00
    0x88 Rx/Tx 7B_0x88 00
    0x89 Rx/Tx 7B_0x89 00
    0x8A Rx/Tx 7B_0x8A 63
    0x8B Rx/Tx 7B_0x8B 00
    0x8C Rx/Tx 7B_0x8C 00
    0x8D Rx/Tx 7B_0x8D 02
    0x8E Rx/Tx 7B_0x8E 1C
    0x8F Rx/Tx 7B_0x8F 00
    0x90 Rx/Tx 7B_0x90 00
    0x91 Rx/Tx 7B_0x91 00
    0x92 Rx/Tx 7B_0x92 00
    0x93 Rx/Tx 7B_0x93 00
    0x94 Rx/Tx 7B_0x94 00
    0x95 Rx/Tx 7B_0x95 00
    0x96 Rx/Tx 7B_0x96 1C
    0x97 Rx/Tx 7B_0x97 00
    0x98 Rx/Tx 7B_0x98 0C
    0x99 Rx/Tx 7B_0x99 3F
    0x9A Rx/Tx 7B_0x9A 3F
    0x9B Rx/Tx 7B_0x9B 00

  • 0 in reply to cannie chang
    TI__Mastermind 19235 points

    Based on your retimer readouts the retimer input eye opening values are excellent. So, most likely there is no signal integrity issue here on the retimer input channel.

    I don't expect you would need any retimer Tx pre-cursor or post-cursor to be applied for this link given the rather low rate of 1.25Gbps. Did the customer implement external AC coupling caps on the retimer outputs?

  • 0 in reply to Rodrigo Natal
    Intellectual 910 points

    it connect to your company chip TLK10232. I use AC couple at both side. both cap one or one cap one 0 ohm resistor has same result. 

  • 0 in reply to cannie chang
    TI__Guru* 93670 points
    Hi Cannie,

    25MHz reference clock is used for initial PLL startup and it is used to enable the device to lock to the specified ppm range. Internally 25MHz reference clock is used so lock time could be marginally lower than when using other reference clock like 125MHz or 325MHz clocks.

    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    Intellectual 910 points

    which frequency jitter performance is better? 25M/125M/312.5M?

  • 0 in reply to cannie chang
    TI__Mastermind 29655 points
    Hi Cannie,

    The 25MHz, 125 MHz, and 312.5 MHz input reference clock options are only used for running a PPM counter to ensure that the device CDR is within a certain PPM tolerance allowed by the device. The reference clock is not part of the CDR's PLL, so it is not related to the retimer's jitter performance per se (please refer to p. 18 of the DS125DF1610 datasheet). For simplicity, I recommend using 25 MHz.

    Regards,

    Michael