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DS90UB954-Q1: DS90UB954-Q1: test pattern can not be recognized by Intel soc

Part Number: DS90UB954-Q1

Hi E2E members,

I am testing to use 954 internal test pattern to inject to Intel SOC, to program 954 registers:

 0x20 0xf0

 0x1F 0x02

 0x32 0x01
 0x33 0x01

 0xB0 0x00

 0xB1 0x01
 0xB2 0x01

 0xB1 0x02
 0xB2 0x33

 0xB1 0x03
 0xB2 0x1E

 0xB1 0x04
 0xB2 0x0A
 0xB1 0x05
 0xB2 0x00

 0xB1 0x06
 0xB2 0x01
 0xB1 0x07
 0xB2 0xE0

 0xB1 0x08
 0xB2 0x02
 0xB1 0x09
 0xB2 0xD0

 0xB1 0x0A
 0xB2 0x04
 0xB1 0x0B
 0xB2 0x1A

 0xB1 0x0C
 0xB2 0x0C
 0xB1 0x0D
 0xB2 0x67

 0xB1 0x0E
 0xB2 0x21

 0xB1 0x0F
 0xB2 0x0A

On soc side, I am using 4 data lanes with 800Mbps. Currently, i can get CSI2 start of frames (SOF) on soc, but with a lot of different errors as below, to cause soc to discard frames.

Single packet header error corrected
Multiple packet header errors detected
Payload checksum (CRC) error
Incomplete long packet detected
Frame sync error
DPHY recoverable synchronization error
DPHY non-recoverable synchronization error
Inter-frame short packet discarded

Do you know any debugging method, that we could use to identify the problem?

Thank you!

Dennis

  • Hello Dennis,

    can you tell me which resolution/ clock/ settings is your SoC expecting?

  • Hi, Hamzeh,

    SOC is expecting 1280x800, Y, Cb, Y, Cr 4:2:2 packed format, 100 MHz CSI2 clock on 4 lanes.

    Thanks,

    Dennis

  • Hello Dennis,

    here is a Code Example for Pattern Generator on the 954:

    #Patgen Fixed Colorbar 1280x720p30
    WriteI2C(0x33,0x01) # CSI0 enable
    WriteI2C(0xB0,0x00) # Indirect Pattern Gen Registers
    WriteI2C(0xB1,0x01) # PGEN_CTL
    WriteI2C(0xB2,0x01)
    WriteI2C(0xB1,0x02) # PGEN_CFG
    WriteI2C(0xB2,0x33)
    WriteI2C(0xB1,0x03) # PGEN_CSI_DI
    WriteI2C(0xB2,0x24)
    WriteI2C(0xB1,0x04) # PGEN_LINE_SIZE1
    WriteI2C(0xB2,0x0F)
    WriteI2C(0xB1,0x05) # PGEN_LINE_SIZE0
    WriteI2C(0xB2,0x00)
    WriteI2C(0xB1,0x06) # PGEN_BAR_SIZE1
    WriteI2C(0xB2,0x01)
    WriteI2C(0xB1,0x07) # PGEN_BAR_SIZE0
    WriteI2C(0xB2,0xE0)
    WriteI2C(0xB1,0x08) # PGEN_ACT_LPF1
    WriteI2C(0xB2,0x02)
    WriteI2C(0xB1,0x09) # PGEN_ACT_LPF0
    WriteI2C(0xB2,0xD0)
    WriteI2C(0xB1,0x0A) # PGEN_TOT_LPF1
    WriteI2C(0xB2,0x04)
    WriteI2C(0xB1,0x0B) # PGEN_TOT_LPF0
    WriteI2C(0xB2,0x1A)
    WriteI2C(0xB1,0x0C) # PGEN_LINE_PD1
    WriteI2C(0xB2,0x0C)
    WriteI2C(0xB1,0x0D) # PGEN_LINE_PD0
    WriteI2C(0xB2,0x67)
    WriteI2C(0xB1,0x0E) # PGEN_VBP
    WriteI2C(0xB2,0x21)
    WriteI2C(0xB1,0x0F) # PGEN_VFP
    WriteI2C(0xB2,0x0A)


    and here is another example:


    # Python script : CSI_patgen_YUV422_10_1280x720p30
    board.WriteReg(0x33, 0x03)
    board.WriteReg(0xB0, 0x02) # IA_AUTO_INC=1 (Auto Incrementing of 0xB1)
    board.WriteReg(0xB1, 0x01) # PGEN_CTL

    board.WriteReg(0xB2, 0x01) # PGEN_ENABLE=1
    board.WriteReg(0xB2, 0x35) # PGEN_CFG
    board.WriteReg(0xB2, 0x1F) # PGEN_CSI_DI
    board.WriteReg(0xB2, 0x0C) # PGEN_LINE_SIZE1
    board.WriteReg(0xB2, 0x80) # PGEN_LINE_SIZE0
    board.WriteReg(0xB2, 0x01) # PGEN_BAR_SIZE1
    board.WriteReg(0xB2, 0x90) # PGEN_BAR_SIZE0
    board.WriteReg(0xB2, 0x02) # PGEN_ACT_LPF1
    board.WriteReg(0xB2, 0xD0) # PGEN_ACT_LPF0
    board.WriteReg(0xB2, 0x03) # PGEN_TOT_LPF1
    board.WriteReg(0xB2, 0x20) # PGEN_TOT_LPF0
    board.WriteReg(0xB2, 0x10) # PGEN_LINE_PD1
    board.WriteReg(0xB2, 0x47) # PGEN_LINE_PD0
    board.WriteReg(0xB2, 0x0A) # PGEN_VBP
    board.WriteReg(0xB2, 0x0A) # PGEN_VFP
    board.WriteReg(0xB2, 0xAA) # PGEN_COLOR0
    board.WriteReg(0xB2, 0x33) # PGEN_COLOR1
    board.WriteReg(0xB2, 0xF0) # PGEN_COLOR2
    board.WriteReg(0xB2, 0x7F) # PGEN_COLOR3
    board.WriteReg(0xB2, 0x55) # PGEN_COLOR4
    board.WriteReg(0xB2, 0xCC) # PGEN_COLOR5
    board.WriteReg(0xB2, 0x0F) # PGEN_COLOR6
    board.WriteReg(0xB2, 0x80) # PGEN_COLOR7
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR8
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR9
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR10
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR11
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR12
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR13
    board.WriteReg(0xB2, 0x00) # PGEN_COLOR14
    board.WriteReg(0xB2, 0x00) # Reserved