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SN65DSI83: Asking for the SN65DSI83 pattern

SHH
Mastermind 31226 points
Part Number: SN65DSI83

Hi Team,
Customer is using TI SN65DSI83 bridge IC to transform MIPI DSI into LVDS.
From the spec, there is one register (aka 0x3C, CHA_TEST_PATTERN) for generating the test pattern.
Customer turn on the bit value. they will get the screen as below.

Customer want to know if TI SN65DSI83 bridge IC has another test pattern like this (link) in other condition (Ex: set wrong register value, DSI data signal is wrong...).

BR,
SHH

  • 0
    TI__Mastermind 31226 points
    Hi team,
    After more experiments, customer know the screen is caused by our panel's protection mode not bridge IC.
    Panel's vendor said that the panel will enter protection mode if we give the panel wrong signal or clock.

    But customer still have another question to ask for your help.

    There are two cases for your reference.
    1. Turn on TI SN65DSI83 test pattern mode => Panel will show the picture correctly.
    2. Turn off TI SN65DSI83 test pattern mode => Panel will show the screen like the video.

    For case 1, bridge IC will ignore MIPI data input and directly transform test pattern data to the panel in LVDS format.
    => It means the data/clock sent by bridge IC to panel is correct and we will see the correct screen.

    For case 2, bridge IC will receive MIPI data input and
    => It means the data/clock sent by bridge IC to panel may be wrong and we will see protection mode screen.

    In case 2, we can't determine if MIPI input data is wrong or output data from bridge IC is wrong.
    Is there any way to check if the data is correct or wrong no matter the input data into bridge IC or the output data transformed by bridge IC?

    video link
    txn.box.com/.../29hx468qmoavvjskvpsjpkei28ap8kz3


    BR,
    SHH
  • 0 in reply to SHH
    TI__Mastermind 18655 points

    Hello SHH,

    I have some questions for case 2:

    Are you following the power-up sequence stated in the datasheet? Could you please send scope captures showing the sequence 

    Is there any error flag set in the 0xE5 register? I suggest clear the 0xE5 register (by writing 0xFF) before reading it.

    Did you use our DSI Tuner tool? Please, export the .dsi from the tool or snapshots.

    Regards

  • 0 in reply to Joel Jimenez0
    TI__Mastermind 31226 points

    Hi Joel,

    the register don't have any error. The value of 0xE5 is 0x01.

    customer use DSI tuner to generate CSR. Attach the snapshots and .dsi file. customer also dump current i2c CSR status for your reference.

    please refer to the attachment for the power sequence and tuner material.

    SN65DSI83_sequence_tuner.7z

    BR,

    SHH

  • 0 in reply to SHH
    TI__Mastermind 18655 points
    Hello BR,

    I'm checking the configuration. Meanwhile, please ask the customer for a capture of the DSI data and clock at power-up. They should be in LP11.
    Make sure you have the MIPI inputs driven to LP11 (both P and N pairs of all MIPI DSI differential pairs to single ended high ~1.2V) prior to asserting EN pin.
    Also, verify that timing configuration provided by the DSI video source (APU) is also correct per the recommendation generated by the DSI Tuner tool (31us).
    The DSI8x does not realign timing. The line time (horizontal sync to the next horizontal sync timing from the APU) on the input is preserved when outputting onto the LVDS interface. If the line time is different from what is calculated by the tool, this will cause issues. Even if the DSI source is outputting streams in a burst manner, it is important for the DSI source to fill in the rest of the line time with blanking packets (or LP11) to meet the line time requirement.

    Regards
  • 0 in reply to Joel Jimenez0
    TI__Mastermind 18655 points
    Any update on the power-up sequence requirement?
    Regards,
    Joel
  • 0 in reply to Joel Jimenez0
    TI__Mastermind 31226 points

    Hi Joel,

    Customer resolve the issue before. However, when customer connect the camera module, cusotmer can not got the LOCK status. The attached are the register dump for RX0/RX1, could you help to check the setting?

    2022.dump-rx0.txt 
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 60 00 16 20 d3 01 00 fe 1c 10 7a 7a ab 09 08 7f    `.? ??.???zz????
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04 02    ..............??
20: 30 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00    0?..............
30: 00 00 00 00 40 00 00 00 00 00 00 01 14 6f 00 40    ....@......??o.@
40: 00 a7 71 01 00 00 00 00 00 00 00 12 01 00 02 00    .?q?.......??.?.
50: 00 00 00 00 00 00 00 00 18 00 00 00 00 00 00 00    ........?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7a 88 88    .............z??
70: 2b 2c e4 00 00 00 00 c5 00 01 00 00 20 00 00 00    +,?....?.?.. ...
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 02 0f 00 00 08 19 00 00 00 00 00 00 00 00 00 00    ??..??..........
b0: 08 14 3f 08 25 00 18 00 8a 33 83 74 80 00 00 00    ????%.?.?3?t?...
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 43 94 17 60 f2 00 02 00 00 00 00 00 00 00 00    .C??`?.?........
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 5f 55 42 39 35 34 00 00 00 00 00 00 00 00 00 00    _UB954..........

    2543.dump-rx1.txt 
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 60 00 16 20 d3 01 00 fe 1c 10 7a 7a ab 09 08 7f    `.? ??.???zz????
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04 02    ..............??
20: 30 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00    0?..............
30: 00 00 00 00 40 00 00 00 00 00 00 01 14 6f 00 40    ....@......??o.@
40: 00 a7 71 01 00 00 00 00 00 00 00 12 12 40 02 00    .?q?.......??@?.
50: 00 00 00 00 00 00 00 00 18 00 00 00 00 00 00 00    ........?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7a 88 88    .............z??
70: 6b 6c e4 00 00 00 00 c5 00 01 00 00 20 00 00 00    kl?....?.?.. ...
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 02 0f 00 00 08 19 00 00 00 00 00 00 00 00 00 00    ??..??..........
b0: 08 14 3f 08 25 00 18 00 8a 33 83 74 80 00 00 00    ????%.?.?3?t?...
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 43 94 03 60 f2 00 03 00 00 00 00 00 00 00 00    .C??`?.?........
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 5f 55 42 39 35 34 00 00 00 00 00 00 00 00 00 00    _UB954..........

    BR,

    SHH

  • 0 in reply to SHH
    TI__Mastermind 31226 points
    Hi Joel,
    Can you please help?
  • 0 in reply to SHH
    TI__Mastermind 35130 points
    Hello SHH,

    Sorry for the delay, I will be taking over for Joel on this issue. Can you clarify for me what issue the customer is seeing? Are you saying the PLL on the DSI83 is not locking? Also, I am not sure how to decipher what's going on with the register dumps you provided as I am not familiar with the format. Are those dumps from the DSI83?

    Regards,
    I.K.