Other Parts Discussed in Thread: SN65LV1023A,
We started a new project of transmission of ADC data over a link ( SN65LV1224B and SN65LV1023A).
In the datasheet, it says that the deserializer can synchronize on on a repetitive multitransition.
It also says that if it found 4 consecutive start/stop bits, it would stay locked until this condition changes.
We do 8B/10B decoding to the ADC data. We also add a sync word to our frame. I wonder if there is any way to reset the chip or force it to look for the sync again?
Our ADC data is DC coupled - therefore, all combinations might be there, even after 8B/10B decoding.
If the DC reading is stuck on such a combination, the SN65LV1224B chip would never go out from false synchronization.
However, if resetting this chip was possible, then we see than we don't get teh SYNC word that we send and then we can force the deserializer to look again for Start/Stop bits.
See Figure #1 in the datasheet for examples of such condition.
Our system must use the random lock syncronization because hte receiver and transmitter are in 2 different far locations without any feedback.
The serializer cannot "know" tha the deserializer is unlocked.
Is there any way to solve that problem?
