Hi team,
I have an issue recognizing the PHY. This the behavior we are seeing:
- Our operating system is probing the MII lines, and via Xilinx Chipscope, we see that during initialization the master is attempting to read registers 0x2 and 0x3 of the PHY.
- We see the PHY responding with its ID from (0x2000, 0xA231)
- After this, the OS responds with “Could not attach PHY” for the Ethernet port
My questions are:
- Do you have any device tree source examples for they PHY (DP83867) that they might use for their processors that run the linux kernel in order to communicate with the PHY?
- Do you have any trouble shooting guides relating to connecting the PHY to any sort of Linux-based operating system?
Thank you.