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TCA6408A: Time needed to clear default 1's from output register

Cochise Fant
Prodigy 50 points

Part Number: TCA6408A

Greetings,

I have encountered an odd problem using the TCA6408A.  From the datasheet I understand that at power up the device configures all IOs to be inputs.  The output register has default value of all 1s (0xFF).  What I want to do is configure the outputs to be all 0s (0x00) by writing the output register and I want all the IOs to be outputs (using the direction register).  I have successfully implemented all of this EXCEPT, what I have found is that even if I write the output register first setting it to (0x00) and then write the direction register setting all the IOs to outputs - I am still getting a 100 us blip on all the IOs where they go HIGH.  It seems as though the TCA6408A is ignoring the order in which it received the I2C writes and is going ahead to set the direction to output first AND THEN applying my 0x00 value to the output register.

I have been able to work around this by first writing 0x00 to the output register, then performing a "dummy" read of the input register (just to introduce some delay), and finally writing the direction register to configure all the IOs to output.

My questions: Why do I need to introduce this delay between writing the output register and writing the direction register to get the part to actually put my desired values out on the IO lines at the time of the direction switch?  Is the delay of reading the input register guaranteed to be a sufficient amount of time to ensure that the output register is stable by the time I switch all the IOs to outputs?

  • 0
    TI__Guru* 80641 points

    Hey Cochise,

    When you are setting this up, are you setting the outputs to 0 first then initiating a stop condition then afterwards setting the configuration (direction) registers to outputs then initiating a stop condition?

    Are your port pins floating or are they pulled low Via a pull down resistor? If not you may want to add a pull down resistor.

    Can you also post scope shots of SDA/SCL when you try to set up the device? (the scope shot should show the write transaction when you see the 100uS blip).

    "My questions: Why do I need to introduce this delay between writing the output register and writing the direction register to get the part to actually put my desired values out on the IO lines at the time of the direction switch?"

    Your delay case seems similar to another asker about an Keypad scanner issue.

    I haven't had too many cases of customers running into this sort of behavior with our GPIOs outside of POR cases.

    "Is the delay of reading the input register guaranteed to be a sufficient amount of time to ensure that the output register is stable by the time I switch all the IOs to outputs?"

    I am wondering if you are not giving the device enough delay between a stop and start condition. I2C standards specify a bus free time between a stop and start.

    Thanks,

    -Bobby

  • 0 in reply to BOBBY
    Prodigy 50 points

    Bobby,

    Thank you for your reply.  Per your recommendation, I decided to get down to the I2C traffic to try and determine whether I am abiding by I2C protocol.  It appears that I am.  I am ending every write with a Stop before starting the next write.  Also, between Stop and Start I've got 10.1 us of bus free time which is more than enough as I am running at 400kHz.

    However, what I noticed is that even though my code writes to the output register first AND THEN writes to the Direction register - this is not what's happening at the hardware level.  Instead, I see now that the Direction register is getting written to first then the Output register.  The 100 us blip is in fact the amount of time from the Stop condition of the Direction register write to the Stop condition of the Output register write.  So it appears there's no problem with the TCA6408A operation.  It's doing everything in the order that's coming in on the I2C bus.

    Additionally, I took a look at the I2C traffic after loading the unit with the code that adds the dummy read between the output register write and the direction register write and found that this code works because it ACTUALLY writes the Output register first, performs the read, AND THEN writes the Direction register...  Now I need to figure out what's causing the software to build with the writes to the Direction register and Output register to be compiled out of order when no dummy read is inserted between them... but this is no longer any concern of TI.

    Sorry for "calling wolf" when there appears to be no problem on the TCA6408A side of this.

  • 0 in reply to Cochise Fant
    TI__Guru* 80641 points
    Hey Cochise,

    Thanks for getting back with us on this matter. Glad to see you were able to debug the issue here. I'm sure other people who search this problem will also find this helpful!

    Thanks again,
    -Bobby