This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UH948-Q1: DS90UH948-Q1 Design question

Part Number: DS90UH948-Q1

Dear,

our function block: TBD

We have some question in TI LVDS DeSes (DS90UH948) application circuit design as below

Q1: DS90UH948 not only be configured by I/O pin , but also by register through I2C , Do we need a I2C flash for initial register program? Or it should be program by host through HSD?

Q2: If register program is recommend, what recommend for the sequence of program time and power on  ?

Q3: there are four D_GPIO(share with I2S)  and eight GPIO, means total 12 GPIO can be used, but we saw “  The back channel contains the I2C, CRC and 4 bits of standard GPIO information with 5 or 20 Mbps line rate (configured by MODE_SEL1). “ is described in datasheet? Do it means only 4 D_GPIO can support backward transmit?

Because it is first we use this deserializer , so if any mis-understand and have wrong question on above, just correct me, thanks in advance.

 

Q4. have ever seen similar design which used in automotive can share to us for reference.


 



Best regards,

 

Lawrence.

  • Lawrence,
    please check below feedbacks.
    Q1: DS90UH948 not only be configured by I/O pin , but also by register through I2C , Do we need a I2C flash for initial register program? Or it should be program by host through HSD?
    TI: dependent on your system request. in most cases, the Ux948 can work with strap I/O pins for some default status. But you also can visit Ux948 through local MCU or remote I2C mode from the serializer side (such as Ux947).

    Q2: If register program is recommend, what recommend for the sequence of program time and power on ?
    TI: For the high speed link, in the de-serializer side Ux948, it is better if you can reset it after the receiver signal is stable.

    Q3: there are four D_GPIO(share with I2S) and eight GPIO, means total 12 GPIO can be used, but we saw “ The back channel contains the I2C, CRC and 4 bits of standard GPIO information with 5 or 20 Mbps line rate (configured by MODE_SEL1). “ is described in datasheet? Do it means only 4 D_GPIO can support backward transmit?
    TI: please see D-GPIO description in d/s, these signals are transmitter through the second FPD-Link channel.

    Because it is first we use this deserializer , so if any mis-understand and have wrong question on above, just correct me, thanks in advance.


    Q4. have ever seen similar design which used in automotive can share to us for reference.
    TI: UB948 is designed for automotive market, almost all 1080P display panels are based on Ux948.


    best regards,
    Steven