Other Parts Discussed in Thread: DS90UB947-Q1,
Hi,
My customer is using SN65DSI85-Q1 as a translator between SoC DSI interface and TI FPD-LINK DS90UB947-Q1 and the display panel is 1920*720*60Hz. Originally, the LVDS clock source of DSI85 was from DSI continuous clock of CHA, but this clock will cause the screen flicker, seem to be missing of DE signal, since DS90UB948 is not losing lock. The issue remains even the pattern in DSI85 is enabled. But after we give a REF clock with the same frequency of the one using DSI clock(after the divider, it is about 45MHz), the pattern can be displayed with no issue. Since the SoC clock jitter can not be optimized, so we want to use external REF clock on DSI85 and try to solve issue in this way. But after we gave a 45MHz ref clock, the display was messed up, no normal display. Seems there is something related to the mismatching of DSI speed and LVDS speed. Question here is : 1) what is the relationship between DSI clock and LVDS clock on DSI85? 2) Is there a buffer to hold video data from DSI and output to LVDS, if yes, what is the size of the buffer? 3) Any recommendations on how to use external reference clock on DSI85 as the LVDS clock source for this issue?
Eric.
