Hi Team,
Please allow me to ask you further question related to following post.
https://e2e.ti.com/support/interface/ethernet/f/903/t/677272
1). Using synchronized clock generated from PTP packet, MAC can be time synchronized with DP83630. DP83630 generates IEEE 1588 clock output based on PTP packet. Does DP83630 dynamically optimizes the IEEE 1588 clock output itself based on the PTP packet receive timing or If there are time difference (difference in synchronized clock) between master and slave, MAC/CPU is needed to correct it in < nano second order through SMI ?
2). Can I understand that the "IEEE 1588 clock output" in Figure 2-2 is synchronized with the 1PPS signal ?
Best Regards,
Kawai
