Dear Team,
A platform takes I2C MUX TCA9544APWR to connect to Skylake SOC I2C port, and three I2C devices are located under the MUX.
Some questions would need your help.
1. Does the MUX device require a Windows device driver for enabling? Or we only need to install Intel Skylake Win7/Win10 I2C drivers?
2. We plan to have unique ID stored in each bay EEPROM, BIOS would need a way to read the IDs from attached bays for recognizing which devices inside of the bays are attached.
This is the way what we proposed and I’m interested on the mechanism to sync up EEPROM of bays to MUX EEPROM if it’s true.
If it’s not, would you please share the way for BIOS to read the IDs through MUX?
BIOS would set selection bit to enable each channel at a time (for detail please refer to below SPEC), after the channel is enabled, the EEPROM data on wireless bay would be synchronized with the EEPROM on the MUX, then we can send smbus command to read data from EEPROM on MUX to recognize which device is installed on each channel.
3. The I2C devices attached to MUX will have the same address as a result the modules will all be built with same I2C address devices.
Is there concern on the same slave address attached to the different I2C ports of MUX?
4. Would you please send me MUX datasheet for reference.
Thank you.
Regards,
Jim