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LMH1983: holdover mode

David Azoulay
Prodigy 250 points
Part Number: LMH1983

Hi all

In the LMH1983 data sheet its says :

"

Holdover mode: In the event that the reference is lost, there is an A/D — D/A pair that is able to take over for

the PLL control loop and hold the VCXO control voltage constant. For this to work properly, the device must

realize that it has lost its reference shortly after the reference is actually lost."

 

where can i find how much time it takes to the LMH1983 to realize that it has lost its reference ? ( numaric number)

im trying to figure how much time its take to enter a holover mode

TNX

 

  • 0
    TI__Expert 5325 points
    Hello David,
    we will try to get a number for you.
    Best regards,
    Patrick
  • 0
    TI__Mastermind 32575 points
    It depends on the input video format and programming, per datasheet section 8.3.8.

    when the PLL is locked and there are missing HSync pulses, LOR is set when the internal counter is greater than the following: (Number of 27 MHz clocks in one Hsync pulse + 3) x (LOR_THRES + 1).

    Assuming 525i and LOR_THRESH = 1 , the LOR would be asserted after ((1716 + 3) x (1 + 1)) / 27 MHz = 127.3 us after the last received Hsync input pulse.

    Alan
  • 0 in reply to Alan O
    Prodigy 250 points
    Hi Alan
    Thank you for you quick respond.

    ill be glad if you can assit me with the following questions:

    1. what is the meaning of "LOR"?
    2. im trying to test this use case:
    How long does it takesto the holdover to take action. ( for that you gave me an answer).

    Also, if the PLL is locked and i'm disconnect my V/H signal input ( referance lost) ...how much time the holdover can stay locked without a referaence before i'm starting to get drift?( maybe there is some formula that i can calculate drift over time?)

    and my last quastion can you recomend me about a test setup that i can valedate the holdover stability over time ?


    thank you
  • 0 in reply to David Azoulay
    TI__Mastermind 32575 points
    LOR means loss of reference. The frequency drift happens immediately once LOR occurs. The drift is dependent on the VCXO stability (over temperature) and the VCXO frequency accuracy/error upon LOR due to Vc voltage shift in the PLL unlocked condition. I don't have equation for this, unfortunately, as the VCXO frequency stability is not straight forward to model.

    Alan
  • 0 in reply to Alan O
    Prodigy 250 points

    Alan O said:
    LOR means loss of reference. The frequency drift happens immediately once LOR occurs. The drift is dependent on the VCXO stability (over temperature) and the VCXO frequency accuracy/error upon LOR due to Vc voltage shift in the PLL unlocked condition. I don't have equation for this, unfortunately, as the VCXO frequency stability is not straight forward to model.

    Alan

    Hi Alan

    Thanke you for your quick respond.

    can you recommend me on a method to test the holdover -  maybe there is a way that i can masure the dfrequency drift over time?
    (i have a controled temprature chamber.)


    thank you

  • 0 in reply to David Azoulay
    TI__Mastermind 32575 points
    Hi David,

    The test setup would be to use a precision frequency counter and data-log/plot the LMH1983 output clock frequency vs. time when a) locked to the reference input, then b) reference input is lost. When reference is lost, the measured output clock frequency will show an offset (which may drift over time) since PLL1 is open-loop. The reference input source and frequency counter should be locked to a common timebase (e.g. 10 MHz EXT REF) to avoid frequency offset/drift in the measurement due to timebase accuracy between the source and measurement equipment.

    Regards,
    Alan