DS90UB948-Q1: DS90UB948

Hello,
The 948 is an open-LDI deserializer with max PCLK frequency of 170 MHz (for dual channel) and 96 MHz (for single channel).
You can look at the FPD-Link IVI device portfolio here:
www.ti.com/.../overview.html

Melina,

1- Display frequency is 55Mhz , but desrilizer Max frequency is 48Mhz ,will it be any issue?
--> why de-sterilizer max freq. is 48MHz? It is not correct.

2- Seriliser DS90UB929 is fixed and display is also Fixed , is there any solution to use any other desrilizer ?
--> dependent on your display panel I/f, TI can provide many diff. I/f for display panel application.


best regards,
Steven

    As per our understanding 96Mhz is for input side maximum clock frequency  of the single channel FPD-Link side,

But we want to know in Open LDI output side [display side ] maximum frequency as per the below configuration , In datasheet it is mention as 48Mhz is the maximum ,

Or could you please check whether the attached LCD can support for 948 desriliser with single channel input ?  

Hi   Junqiang Shi

    Can we use 55Mhz dot frequency display  in  below configuration , but why bedsheets is showing 48Mhz is the maximum for below configuration [1 lane FPD III input 2 lane open LDI out] ?

Hi, Please check the block in figure31 that you mentioned "48MHz". it is limited by the 1-lane FPDLink input. as you know, when 1-lane FPD-Link input, the receiver data rate is 3.36Gbps max, and maximum PCLK is 96MHz. In this condition, of couse the output LVDS clock is maximum 48MHz for dual OLDI output (or 96MHz for single OLDI output).

In your application, please understand the PCLK freq. For both UB947 and UB948, the input and output PCLKs are same!

best regards,

Steven