I am designing a circuit with DP159 in DisplayPort application. From Application Report SLLA358, "In X-Mode, the DP159 can support DisplayPort datarates up to 5.4Gbps (HBR2)."
I need to figure out the length matching and impedance matching settings in the PCB layout. Since DisplayPort has 4 data lanes with embedded clock, no dedicated clock lane, should I use 5.4GHz on these data lanes?
In other words, if the data lane is transmitting "010101......" sequence, the equivalent frequency is 5.4GHz?
Thank you