Is there any data valid signal to TUSB1310 from link controller?
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Anne,
There is not any sort of single data valid signal between the TUSB1310 and the link controller that would be contained in the FPGA. There are two separate data paths between the TUSB1310 and the link - PIPE3 interface for SuperSpeed signalling and ULPI for USB 2.0.
Both the PIPE3 and ULPI inetrfaces are industry standards where you can get the specifications from the owners - PIPE is from Intel, ULPI was originally defined ny NXP, but is based on the UTMI spec that was developed by Intel as well.
The control signals for the two different interfaces are defined in section 2 of the data sheet.