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DS80PCI402: Capacitor termination at OUTA/B and INA/B lines

DEEPAK V14
Intellectual 810 points
Part Number: DS80PCI402

Hi,

Q1. Do the capacitor have to be placed on both OUTA_xx, OUTB_xx and INA_xx and INB_xx lines? Which is the preferred position for these capacitors to be placed?
Is it near to the INA/B_xx pins and away from OUTA/B_xx pins?

Q2. As of now, my understanding is that OUTA/B_xx pins are output pins and INA/B_xx are input pin types. But the direction of these pins is wrongly mentioned on Page 4. Why?

Q3. The RATE pin is in RESERVED when it tied to VDD through 1K? What is mean by the term RESERVED in this context? Whether Gen 2 de-emphasis is possible in this mode?

Q4. What does 'R' denote in Table:5 of page 16 with respect to the signal SD_TH?

Thanks and Regards
DEEPAK V

  • 0
    TI__Mastermind 43795 points

    Hi Deepak,

    1. Yes the preferred location is away from the Output pins and closer to the Input pins.  Typically AC coupling capacitors in PCI Express are placed on the same PCB as the transmit outputs.  If there is another board in the system the capacitors may already be on that board.  There is no need to have two sets of AC coupling capacitors in series.

    2. There is a typo on page 4. The OUTA/B pins are indeed outputs.

    3. The RATE function tied to VDD with a 1K is not a valid input configuration for the DS80PCI402.  Operation in this mode is not specified.

    4. The input configuration pins have 4 possible states 0, R, Float, and 1.

    0 = 1K to GND

    R = 20K to GND

    F = Float (no connection)

    1 = 1K to VIN or 1K to VDD (Use VDD in 2.5V mode, use VIN in 3.3V mode)

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Intellectual 810 points

    Hi Lee,

    Thank you for replying my queries.
    The answer to my questions Q2, Q3 and Q4 are completely resolved and some doubts still persist in Q1. Before getting into that I will briefly depict the project requirement.

    As the part of project a custom Kintex-7 FPGA(410T) board is under development. And the data transfer between this custom FPGA board and  PC (motherboard) is planned through PCIE gen2 x4 lanes.
    At the PC(HOST) side, a host adpter from terasIC 'PCA3' is being used.
    www.terasic.com.tw/.../archive.pl
    And the connection from Custom Kintex7 FPGA board to host adaptor PCA3 is establish through iPass connector cable(3meter: 0745460403) from Molex.

    Q1. In the schematic design of custom FPGA board, the coupling capacitors are placed only on Transmit lanes and not on Receiver lanes of FPGA.
           Do this connection is right? Please have a look at the attached block diagram.

     

    Q2. The host adapter PCA3 at PC side already have DS80PCI402 as a part of it. But still we are incorporating DS80PCI402 at the schematics of custom Kintex-7 FPGA(410T) board under development.
           Is it OK to have two DS80PCI402  drivers in the same PCIE path. Do there anything additional to be taken care in this case?

    Q3. Since PCA3 already have DS80PCI402 driver, is it recommended to design Kintex-7 FPGA(410T) board without any DS80PCI402 driver in it?

    Q4. Kindly help me in getting IBIS file of DS80PCI402 to perform SI analysis using Hyper-lynx.

    Thanks once again for continuing support.

    Regards
    DEEPAK V

  • 0 in reply to DEEPAK V14
    TI__Mastermind 43795 points

    Hi Deepak

    I would not place an additional DS80PCI402 redriver in the path.

    The FPGA board will only need capacitors on the Tx pins. The TerasIC board already has capacitors on its Tx pins which are connected to the FPGA Rx pins.

    The IBIS-AMI model is available by sending mail to the link below. 

    www.ti.com/.../snlm143

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    TI__Genius 9390 points

    Hi Lee,

    You suggested that the preferred location is away from the Output pins and closer to the Input pins for ac coupling caps.

    However, why are all input caps located at the connectors on the DS80PCI402 EVM?

    Thanks!

    Roy Hsu

  • 0 in reply to Roy Hsu
    TI__Mastermind 43795 points

    Hi Roy,

    The DS80PCI402 EVM is designed to be universal.  Since it has SMAs on all the high speed connections AC coupling capacitors are added as well.  This helps to interface with most modern test equipment like oscilloscopes and generators.

    Regards,

    Lee