Other Parts Discussed in Thread: DP83867E
Hi,
Our customer has some questions need confirm as below:
1) RX_CTRL mode setting definition(See DP83867IS DS page 37)
For Autoneg Disable function, if customer wants setting Autoneg enable will setting "0"(MODE3), right?
2)The clock pin relative of GPIO_0,GPIO_1,LED_2,LED_1 mode setting definition(See DP83867IS DS page 37)
Normally, should be setting MODE"1", right? If yes, when will setting table 8 and table 9? (See DP83867IS DS page 38/39)
3)For LED_0 setting(See DP83867IS DS page 38)
If customer wants Mirror Enable setting "1", and wants SGMII Enable setting "1" =>Mode4
Else if customer wants Mirror Disable setting "0", and wants RGMII Enable setting "0" =>Mode0, correct?
4)For Mirror definition, we can see "DP83867E SGMII EVM User guide" page 12.
For J18 to T1 connection, T1 double A connect to J18 pin 7/8.
T1 double B connect to J18 pin 5/6.
T1 double C connect to J18 pin 3/4.
T1 double D connect to J18 pin 1/2.
And base on DP83867IS DS page 35 Mirror mode definition: A->D,B->C need set mirror mode to enable(1), right?
Warm Regards,
Kevin Lin
