Other Parts Discussed in Thread: AWR1243
Hi, we are developing a cascaded system with four AWR1243 devices and four (possibly 2?) DS90UB953 for serialization, which will then connect via coax FPD to a Fusion board attached to a TDA2Px. I am working on the clocking scheme. We want the AWRs to take 256 samples on all four receivers during a 20us ramp. At 12 bits, complex, that is 307.2Mbps per receiver during the ramp. Using four CSI-2 outputs, it’s within the max 450Mbps spec per channel. I would like to have the 25MHz clock on the Fusion board be the master clock for the data flow, run the UB953 serializer in synchronous mode, and from it derive the reference clock for all four of the AWRs. One of the AWRs will be the master for the 20GHz FM_CW clocks fed to itself and the other three AWRs. Let me know if there are any showstoppers in this approach. My questions are:
1. From the UB953 datasheet, table 6 shows that for synchronous mode, with a 25MHz reference clock (f), the CSI bandwidth is f x 128 = 3.2Gbps. Given the AWR output data rate of 307.2Mbps per receiver, can I run two CSI-2 outputs from each AWR at 614.4Mbps each (total 1.2288Gbps) and connect two AWRs to one UB953 (total 2.4576Gbps on four lanes) for serialization?
1a. If the above is NOT true, and I need to use four UB953s, what’s the best way to prevent I2C address conflicts since each UB953 only has a choice of two addresses? Can I somehow utilize the Slave ID Alias feature (UB953 datasheet sections 7.7.52 – 7.7.67). I’m guessing not. It seems that it’s for I2C devices connected to the deserializer. This topic is not detailed in the diagram on the Jan 19th E2E post https://e2e.ti.com/support/sensor/mmwave_sensors/f/1023/t/657535 .
3. What frequency should the reference clocks to the AWRs be? We want a 20us chirp with a 2us idle time for a 22us Total chirp time. Frequency change over the 20us is 200MHz. Perhaps this has no influence on ref clk frequency and I can just generate 50MHz from the UB953 and distribute?
4. For configuring registers on the UB953 via the BCC from the deserializer/Fusion/TDA2Px, is the connection to the I2C bus internal to the UB953? Thus, addressing the UB953s from the controller on the TDA2Px is possible?
5. For the physical FPD coax connections to the Fusion board, do you supply or offer the mating coax cable assemblies? If so, what are the part numbers? Also the PN 59S20X-400L5-Z on the Fusion BOM does not appear to be correct/current. It should be 59S20X-400T5-Z. See http://rosenberger.de/ok/images/documents/db/59S20X-400T5-Y.pdf
6. Since the AWRs will be hardware triggered (using SYNC_IN), should I just use independent GPIO lines from the TDA2Px board? I’d rather not have the time uncertainty of the GPIO over the BCC and through the UB953. The TDA will not be far from the AWR, probably less than 6 inches.
If you want to see my tentative block diagram, let me know.
BTW, there may be an error in Figure 6-1 on the AWR datasheet regarding the 20GHz clock muxes. The FM_CW outputs appear to be connected the MUX input, and there is no output from the mux that the RFSYNTH block is connected to.
Thank you.
