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DS90UB954-Q1: Line Length Error

Part Number: DS90UB954-Q1

Hi team,

Several problems are occurring in the system of our customers.

The data sent from the camera module of 953 is being output partway, but Line length error and checksum error occurred and output stopped.

I have 2 questions.

#1

They are saying that they handle CSI long packet data with no packet footer added.

Can systems in 953-954 handle data without PF?

#2

They are setting that FS_MODE is back channel of Port 0 and FS_GEN_MODE is Hi / Lo mode.

However, it seems that both FRAMESYNC_HIGH_TIME and FRAMESYNC_LOW_TIME remain the default 0.

Does LINE_LENGTH_ERR or CKSUM_ERR occur due to this setting?

Best regards,

Tomoaki Yoshida

  • Hello,

    Yes, the packet footer is required as this contains the checksum information for the CSI-2 packet.
    Checking Rx port status registers 0x4E will report if irregular line length is observed. Please verify you have stable link and no parity errors or loss of lock in status registers 0x4D.
    In case of irregular line the deserializer by default will pass lines but flag the error depending whether bits in register 0x7E are set .
    The error handling is described in section 7.5.9.
  • Hi Liam-san,

    Thank you for your support.

    The register 0x4D was 0x3, PASS and LOCK was stable.
    And 0x4E was 0x0C.
    The Line length had not be changed, but line length error and checksum error has detected.
    The CSI error 0x7B was 255 and both line count and line length were over 1,000.

    I think that CSI packet header and data are sent correctly, but line length and chksum have errors on all lines because there is no packet footer.
    Will line length error be detected due to lack of packet footer?
    Also, is it right that 953-954 can't handle CSI packets without a packet footer?

    Best regards,
    Tomoaki Yoshida
  • Hello,
    Long packet footer is required by CSI-2 standard for CRC protection. Yes this will cause protocol errors to be detected. With proper configuration of registers 0x6D and 0x7C the DS90UB954 will forward all CSI-2 data regardless of errors.
    I do not believe it is possible to remove packet footer and meet CSI-2 compliance.

    Regards,
  • Hi Liam-san,

    I'm sorry for late reply and there was a mistake in previous information.
    When asking our customers for confirmation, it seems that PH and PF are correctly inserted.
    However, there is no Line start and Line end.

    Can you check the register dump file to see if the setting is correct?

    Best regards,
    Tomoaki Yoshida

  • Hello,
    Short packets for line start and line end are optional.
    For better visibility to the timing, you can program any unused GPIO on the deserializer to output Frame Valid and Line Valid signals as interpreted by the deserializer.
    These are set starting in register 0x0F per table 7 in the 954 datasheet.