TPS65982: GPIO0-8 function of TPS65982

user5326460

Part Number: TPS65982

Intel CFL-H thounderbolt recomended schematic is Aphine Ridge + 2x TPS65982(primary & secondery). Intel document ID is 570734

what is the function of TPS65982 GPIO0-8 ?

I need help from ti engineer who coworked with Intel for this section.

over 8 years ago

0 Eric Beljaars over 8 years ago

TI__Mastermind 36756 points

Hello,

Is this design for a thunderbolt host or device?

Thank you,
Eric

0 user5326460 over 8 years ago in reply to Eric Beljaars

Prodigy 50 points

Hi Eric：

thunderbolt host
thanks

Eden

0 Eric Beljaars over 8 years ago in reply to user5326460

TI__Mastermind 36756 points

Hi Eden,

I cannot see where those GPIOs connect to in the schematic snippet. It would be best if you could look for the function of each GPIO in the reference design by seeing which GPIOs connect to what. You can then configure the TPS65982 using the Application Customization GUI to meet your systems needs.

If this answers your question, PLEASE select This resolved my issue

Thank you,

Eric

0 user5326460 over 8 years ago in reply to Eric Beljaars

Prodigy 50 points

Hi Eric:

If it is convenient , could you refer to Intel document 570734 .
For this section，it must be TI enginner coworked with Intel engineer , because TI must provide FW to configure the GPIOs.
If we can receive help from TI engineer who coworked with Intel ，I think this problem will be solved soon.
Thanks you

Eden

0 Jacob Ontiveros over 8 years ago in reply to user5326460

TI__Expert 6280 points

Hi Eden,

This GPIO is a fault pin that is open drain and is connected to the I2C IRQ. This is used to let AR know that there has been some type of over current, over voltage, etc. event.

Jacob

0 user5326460 over 8 years ago in reply to Jacob Ontiveros

Prodigy 50 points

Hi Jacob：

There are 9 GPIOs each PD controller .Coud you list detailed usage each of them
Thanks

Eden

0 Jacob Ontiveros over 8 years ago in reply to user5326460

TI__Expert 6280 points

Hi Eden,

All of these GPIOs are specific to the reference design. When using the configuration tool there is an option for this reference design that would set all of the appropriate GPIO. Is there a specific issue that you are seeing?

Jacob

0 user5326460 over 8 years ago in reply to Jacob Ontiveros

Prodigy 50 points

Hi Jacob：

Now we are designing schametic，we do not know the GPIO specific usage in reference design.
Because FW is provided by TI , so TI cowork engineer must know it.
thanks

Eden

0 Eric Beljaars over 8 years ago in reply to user5326460

TI__Mastermind 36756 points

Hi Eden,

If you download the TPS6598x Configuration Tool:

You can open the template used for this TPS65982 Intel Host reference design. You can then look at the GPIO configuration register to see what all of the GPIOs are connected to.

If this answers your question, PLEASE select This resolved my issue

Thank you,

Eric

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TPS65982: GPIO0-8 function of TPS65982