Dear all,
I am a newbie and am currently having a project to develop an I2C
protocol in VHDL. My aim is to communicate between two FPGA cyclone 2
, one as master and one as slave. I wonder if any of you could
provide me with some ideas on how I should start. I2C has 2 wires, SCL
and SDA; all I have to do is to play with these two wires? What else
should be considered? What I should do next?
Tank you for your precious time and your considerations.
Thanks a lot!