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Dear all,

I am a newbie and am currently having a project to develop an I2C
protocol in VHDL.  My aim is to communicate between two FPGA cyclone 2
, one as master and one as slave.  I wonder if any of you could
provide me with some ideas on how I should start.  I2C has 2 wires, SCL
and SDA; all I have to do is to play with these two wires?  What else
should be considered?  What I should do next?

Tank you for your precious time and your considerations. 

Thanks a lot!
  • Hi Kassab,

    I would start by reading through the I2C standard, which is a free download and not too long. That will give you an idea on how read and write operations both work. You are right, though, in that it is a two-wire interface. SDA represents the data, and SCL provides a clock signal so that it is clear when the data should be considered valid. Both lines use open drain signaling, so make sure your FPGA IOs are configured as such (this helps with the bidirectionality). I bet if you search around online you could find some example firmware implementations that would be a useful reference.

    Good luck, and feel free to let us know if you have any specific questions as you progress.

    Max