ISO5852S: 10kW 3-Phase 3-Level Grid Tie Inverter Reference Design for Solar String Inverter Reference Design

Hi Alvaro,

In a three-level T-type inverter, there are two complementary switch pairs in each phase. A complementary switch pair is controlled with two complementary PWM gate signals. For example, in phase A, the PWM signals G1 and G4 are complementary while PWM signals G2 and G3 are complementary. DESAT faults usually occur when the complementary PWM signals are gated on at the same time. In case of a DESAT fault, both complementary switches would enter linear region which can be detected through DESAT function. That said, the DESAT fault can be detected when either of the switches is driven with gate driver with DESAT protection.

It is of worth noting that the ISO5852S and UCC5320 combination can't detect the short circuit events caused by phase output terminal short to high voltage dc rails. In order to handle this case, all the switches need to be driven with gate drivers with DESAT protection. However, the trade-off is higher system cost.

With Regards,

Xiong