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TCA9406: How to calculate max capacitance

Part Number: TCA9406
Other Parts Discussed in Thread: TCA9617B

Team,

I have a customer presently using TCA9406. There is a section in the datasheet that I would like some clarifications on, copied below. What concretely speaking are the system design constraints? Regarding signal trace lengths can I infer that 15ft in free space and 7.5ft in FR4 are the conductor length limits to avoid reflections? How do I calculate the maximum capacitance?

8.3.3 Output Load Considerations

TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay on for approximately 30 ns. The maximum capacitance of the lumped load that can be driven also depends directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance that the TCA9406 output sees, so it is recommended that this lumped-load capacitance be considered to avoid O.S. re-triggering, bus contention, output signal oscillations, or other adverse system-level affects.

  • Hello Carolus,

    This part was designed to support Fast Mode Plus (1 MHz) I2C signals.  Per the I2C standard we can not have more than 550 pF on the bus.  This part does have a rise time accelerator which can cause some problems for very long longs, but generally lines that are that long would exceed the max bus capacitance required by the standard. 

    Calculating capacitance of a PCB trace or even wires in a harness is not to hard to do and their are a lot of app notes out there.  I have found a great tool that integrates a lot of these calculations into a easy to use GUI.  It is called "Saturn PCB Design - PCB Toolkit".  Here is the link.

    http://www.saturnpcb.com/pcb_toolkit.htm

    I am not sure where you are getting 15 ft. in free space and 7.5 ft in FR4?  Where did you get this?  You would have to make assumptions about the pcb trace width, the dielectric thickness (or distance from bus to ground), how it is placed in the pcb (micro strip, embedded microstrip, stripline, etc.)  If you give me more information about the application and some of the design parameters I can help you.  Have you looked at the TCA9617B as also another buffer that does Fast Mode Plus.  This doesn't have rise time accelerators and is much less likely to have reflection issues because of that.  Note, reflections are due to the ramp rates on the signals rather than the operating frequency. 

    -Francis Houde