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Original question:

TMDS171: Input inter-pair skew tolerance

TMDS171: Input inter-pair skew tolerance

Giuseppe Cannarella_AE
Prodigy 95 points

Part Number: TMDS171
Other Parts Discussed in Thread: DS22EV5110

Hi,

The DVI specification 1.0 defines a maximum Interpair skew at receiver of 0.6*Tpixel. This means that the maximum interpair skew is dependant of Tpixel value (system frequency/ video resolution).

In the TMDS171 datasheet is specified a maximum interpair skew (at receiver) of 1.8 ns (page 8 TMDS Differential Input). Following this description the TMDS171 interpair skew tolerance is independent from Tpixel. If true this means that also at low Tpixel frequency this specification must be meets; this is more tight than DVI specification.

Eg: for a Tpixel of 100MHz by DVI specification we have a maximum tolerated interpair skew of 16.667 ns that is around 10 times more tolerant respect to TMDS171 specification.

Anyone can confirm that my understanding is right? Is TMDS171 have less interpair skew tolerance than DVI specification ?
Thank you in advance.

  • 0
    TI__Guru 64326 points
    Giuseppe,

    I believe your understanding is correct, TMDS171 has less interpair skew than DVI spec when Tpixel is greater than 3 ns.
  • 0 in reply to Malik Barton57
    Prodigy 95 points
    HI Malik,
    thank you for you prompt answer.

    The DS22EV5110 datasheet(at page 13 "CABLE SELECTION AND INTER-PAIR SKEW") says that "The DS22EV5110 intends to extend the
    longer cable reach with STP (DVI / HDMI) cable, or UTP
    (Cat5 / Cat5e / Cat6) cable, and it does not have a de-skew
    function to compensate any cable Inter-Pair Skews. Long cable
    with Inter-Pair Skew exceeding the DVI / HDMI standard
    limit tolerance could cause system distortion"
    So, it's clear that the DS22EV5110 tolerates interpair skew as per DVI specification but why TMDS171 have a very tight limit?
    Both IC have a reming function, the TMDS171 seems to have an additional the Deskew function (main datasheet page says"Inter-Pair Skew Compensation of 5+ Bits").
    When and how the deskew circuit works?
    Thank you
  • 0 in reply to Giuseppe Cannarella_AE
    TI__Guru 60870 points

    Hi Giuseppe,

    The inter-pair skew in the datasheet should read:  T_RX_INTER (MAX) : 0.2*Tcharacter +1.78 ns  This matches the HDMI 1.4B specification and is where the number originates.

    Regards,

    JMMN

  • 0 in reply to JMMN
    Prodigy 95 points

    Hi,

    thank you for your answer!

    If my calculations are right seems that DVI specification are less strict than HDMI:

    DVI (at receiver side) specify a Max interpair skew of: 0.6 * Tpixel

    HDMI (at receiver side) specify a Max interpair skew of: 0.2*Tcharacter +1.78 ns

    This means that for example a 100MHz TMDS clock can reach up to 6ns of interpair skew in a DVI system and "only" 3.78ns in a HDMI system. For higher clock value  the difference is reduced (Eg 200MHz 3ns in DVI vs 2.78 in HDMI). Can you confirm that my understanding is right?

    Turning back to TI devices, where is the benefit of the deskew function (5+ bits) described in TMDS171 datasheet main page? I suppose that works only in redriver mode... can you confirm?

    What is the max interpair skew at receiver of the DS22EV5110 ?

    Comparing the TMDS171 with DS22EV5110 which device have best Interpair skew tolerance?

    Regards,

    Giuseppe

  • 0 in reply to Giuseppe Cannarella_AE
    TI__Guru 60870 points

    Hi Giuseppe,

    The TMDS171 will only compensate for skew in retimer mode, not redriver mode.  The TMDS171 may be able to accept the skew of the DVI input, but the datasheet was geared towards HDMI 1.4B devices and thus the HDMI 1.4B value was used instead.  I'll ask the DVI team to comment on the DS22EV5110.

    Thanks,

    JMMN

  • 0 in reply to JMMN
    TI__Guru* 93570 points
    Hi Giuseppe,

    As you noted, DS22EV5110 does not have de-skew function and this parameter was not characterized. There is a inter pair skew of 3ps and this was done using clock pattern. This essentialy shows propagation delay within the device for data channels.

    Regards,,nasser