SN65DSI84-Q1: SN65DSI84-Q1 and SN65DSI84 - Software compatibility

ank you for the quick answer.

We are still struggling a bit using the chip, so let me explain the problem on a deeper level.

We are trying to use your SN65DSI84TPAPRQ1 DSI to LVDS converter chip in our new product. We have a development board (VAR-SD410CustomBoard) which contains the same chip but in a BGA package. On this board the chip is working perfectly, the LVDS signal is present, the image is visible on the screen. What we did is we've copied the respective part of schematics from the development board to our board (meanwhile changing the package from BGA to S-PQFP-G64) and tried with the same software, but we are missing the LVDS signal completely. The chip itself is working, we can communicate with it through I2C. We have tried different configurations, but the signal is still not present, it seems like the LVDS lanes are pulled up to different voltage levels, or if we turn off the LVDS channels, they are pulled low. I have checked the DSI signals on both boards and they both look good. We also tried to set the chip in test mode, but we've got the same results.

The pull-up voltages I can measure (referencing to GND) on the LVDS traces are around 1.53V on the negative trace and 0.94V on the positive trace.

I have attached the screenshots of DSI signals, schematics, and layout:

drive.google.com/.../view

Is there a chance that there is a hardware difference between the 2 versions of the chip (SN65DSI84 and  SN65DSI84-Q1)?

Have you met this problem before?

I have sent them to your e-mail, please let me know if it didn't arrive. You can also try this link instead.

Yeah, I think we are doing it in the right way, otherwise it wouldn't work on the development board either, would it?

What I suspect is that the DSI signal is not perfect due to the slightly different impedance on our board. Can you have a look on them, please? The first picture is the DSI signal on the development board, the second picture is the same signal on our board.

Is there a way to find out if the DSI signal is not good enough / recognizable for the chip?

Hi Anyiam,

We've got some issues during the certification of the product, the LVDS is cable is radiating too much, even though it's shielded.

I have seen that this is an industrial (automotive) chip, which usually have a different class of EMI certification (class A). We are using the chip in a consumer product, which is class B.

Can this be the problem for the radiation?

Have you got similar problems before? Do you have any recommendations?

I have attached the plot of the spectrum analyzer and a picture of the setup.

The LVDS cable is 42 cm long and the shielding is grounded on the source (screen) side with copper tape to the screen's chase. The screen is only grounded through the power and LVDS cable.

Hi Anyiam,

Spread spectrum clocking is something we have to enable on the main processor (DSI source), is this correct?

Hi Anyiam,

We have tried the things you have recommended (spread clock, common mode chokes, shielding of the cable endings), and it helped a lot with the 54 MHz spike, but we still have a huge one on 216 MHz, which is probably the 4th harmonic of the 54 MHz LVDS clock (I have attached the pictures of the setup and results). Do you have any further ideas, what can we try to eliminate the harmonics?

Hi,

We have tried the minimum and maximum VOD value, but didn't really make any difference.

Hi Anyiam,

We have chokes on all the outputs (2x clock + 8x data lanes), not only on the clock. Is this a problem?

I use this choke: DLP11SN900HL2 with 90 ohm impedance at 100 MHz, 1.5 ohm DC resistance and 150 mA. I have tried many different types from Murata, but this seemed the most effective in terms of noise suppression, meanwhile the screen still works.

I will try to hack the series resistors in tomorrow (we have the final EMI test the same day haha). Is it enough if I have them on the clock or do I need to add them on all the lanes?

Is it a good idea to add chokes / series resistors on the DSI lanes between the main processor and the bridge IC as well? I suspect that it might be some interference from those signals too, because we create the LVDS clock from the DSI clock.

Greetings,
Péter Szilágyi

Hi Anyiam,

Should the series resistors be before or after the common mode chokes?