Customer is looking at the TLK6002 and he would like to confirm a behavior.
If I'm providing a refclk into the TLK6002 but I currently don't have any high speed serial data, ie the LOSA = '1'. The clk_out is set to rxclk_a. What is output on both the clk_out and rxclk_a pins? A signal that is synchronous to a divided refclk?
Once the high speed serial data is restored does the clk_out and rxclk_a outputs automatically shift to be synchronous to the recovered clock from the data stream? Or is there some sort of 'reset' procedure that must occur? Thanks.
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