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DP83848I: DP83848I with STM32F207 in RMII mode

Alberto Ferrero64
Prodigy 50 points
Part Number: DP83848I
Other Parts Discussed in Thread: DP83822I

Dear Sirs,

I'm using the DP83848I with STM32F207 in RMII mode.

It seems to be working well, but checking the timings for RXD[0:1] from the Phy, I found that the minimum delay from X1 rise to data transition is 2ns (T2.25.2 in datasheet), while the STM32F207 requires a hold time tih(RXD) on these signals at least 1.5ns. It means that there are only 500ps as max skew between the clock and RX data at the uC ports. Furthermore, due to temperature, aging, clock slpes, etc... this timing seems to be very critical. My questions are:

-what's your opinion about this?

- are you aware of any design using DP83848I and STM32F207 in RMII mode

- since the declared value for T2.25.2 is very spreaded (2ns to 14ns!!!) do you think there are conditions where it is granted a min time greater than i.e. 3ns instead 2ns (for example, in case the min temperature is -25°C instead of -40°C)

I look forward to your kind reply.

Best Regards,

Alberto.

  • 0
    TI__Mastermind 18425 points
    Hi Alberto,

    DP83848 meets RMII sepecifications across the range of recommended operation conditions. RMII application with a RMII compliant MAC should not be an issue. The clock cycle duration is 20ns, setup time is 2ns and hold time is 1.5ns. I am not sure what is your concern about timing here. Can you kindly elaborate what you anticipate to be a problem?

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    Prodigy 50 points

    Dear Aniruddha,

    my concern is that there are only 500ps for RMII MAC as a margin to grant the min hold time (1.5ns) in case DP83848 sends RXD data applying its min output delay time (T2.27.2 = 2ns). Considering that the clock rising time may be up to 6ns depending on the chosen oscillator, I wander if 500ps are enough to grant the operations in case of timings close to the limits of thei ranges.

     

    I look forward to your comments.

    Best Regards,

    Alberto.

  • 0 in reply to Alberto Ferrero64
    TI__Mastermind 18425 points
    Hi Alberto,

    Thank you providing more information. I understand your concern now. The RX output transition time is spec'd in the datasheet to be between 2-14ns. As long as the PHY operates within the datasheet operating conditions, the delay should not fall below 2ns. DP83848I has been released for a long time and has been implemented in various RMII applications without any issue.
    If this is a new design and you want to review a PHY with more margin on the delay, you can look at the DP83822I. It is our new 10/100M ethernet PHY for Industrial application. In RMII mode, the receive delay is between 4-14ns.

    -Regards,
    Aniruddha