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SN65DSI86: Application.

Naser S.
Genius 11605 points
Part Number: SN65DSI86


We have the below questions on this part.

 1)      The bridge chip seems to support only DSI video mode, how host can enable eDP PSR mode as that require something like MIPI DSI command mode?

2)      On 8.4.5.9 Panel Self Refresh (PSR) I see below statement “Updates to the remote frame buffer located in sink must include two of the same static frame. The reason for this requirement is the SN65DSI86 will never pass the first frame received on the DSI interface to the DisplayPort interface. All subsequent frames will be passed to the DisplayPort interface”

Question I have is do we need double frame buffer on sink to support eDP PSR modes?

3)      How MIPI get’s AUX channel information regarding panel configuration like EDID info?

4)    2)  Do we have any other part which can expect MIPI-DSI command mode input so that it is easier to enable eDP PSR and save power from host. Thanks.

  • 0
    TI__Mastermind 19720 points
    1) The bridge chip seems to support only DSI video mode, how host can enable eDP PSR mode as that require something like MIPI DSI command mode?

    I will have to consult with other engineers to answer this question.

    2) On 8.4.5.9 Panel Self Refresh (PSR) I see below statement “Updates to the remote frame buffer located in sink must include two of the same static frame. The reason for this requirement is the SN65DSI86 will never pass the first frame received on the DSI interface to the DisplayPort interface. All subsequent frames will be passed to the DisplayPort interface”

    Question I have is do we need double frame buffer on sink to support eDP PSR modes?

    No you do not.

    3) How MIPI get’s AUX channel information regarding panel configuration like EDID info?

    The SN75DSI86 will have the EDID programmed through I2C and will communicate that information to the MIPI source.

    4) 2) Do we have any other part which can expect MIPI-DSI command mode input so that it is easier to enable eDP PSR and save power from host. Thanks.

    No we do not have another part that expects MIPI-DSI
  • 0 in reply to Michael.Walker
    TI__Genius 11605 points
    Michael Walker: Please let me know when you have response on #1 . Also See below follow up from customer on question #2 and #3.

    2) On 8.4.5.9 Panel Self Refresh (PSR) I see below statement “Updates to the remote frame buffer located in sink must include two of the same static frame. The reason for this requirement is the SN65DSI86 will never pass the first frame received on the DSI interface to the DisplayPort interface. All subsequent frames will be passed to the DisplayPort interface”
    Question I have is do we need double frame buffer on sink to support eDP PSR modes?
    ** No you do not to double frame buffer..

    [Customer] In that case can you please clarify above highlighted sentence on what is expected from source and sink?

    3) How MIPI get’s AUX channel information regarding panel configuration like EDID info?
    **The SN75DSI86 will have the EDID programmed through I2C and will communicate that information to the MIPI source.

    [Customer] how it will communicate info to MIPI source?
  • 0 in reply to Naser S.
    TI__Mastermind 19720 points
    I was incorrect in my previous post so let me correct.

    1) The bridge chip seems to support only DSI video mode, how host can enable eDP PSR mode as that require something like MIPI DSI command mode?

    We are not aware of any MIPI DSI command mode PSR.

    2) On 8.4.5.9 Panel Self Refresh (PSR) I see below statement “Updates to the remote frame buffer located in sink must include two of the same static frame. The reason for this requirement is the SN65DSI86 will never pass the first frame received on the DSI interface to the DisplayPort interface. All subsequent frames will be passed to the DisplayPort interface”

    Question I have is do we need double frame buffer on sink to support eDP PSR modes?

    The DSI86 will throw the first frame away so as long as you send the first frame twice you should be fine. The sink should not need to worry about the source sending the same frame twice.

    3) How MIPI get’s AUX channel information regarding panel configuration like EDID info?

    The MIPI can get the AUX channel info from the two methods described in the section 8.4.5.3.1 and 8.4.5.3.2.