Part Number: TUSB4041I
Hello support team,
7.6 "The Power-Up Timing Requirements" section on page 10 of the datasheet contains the notes (1) ~ (3). Can I understand (1) and (2) as follows?
There is no restriction concerning the rise order and time between VDD33 and VDD (1.1 V) if GRSTz is controlled externally.
However, it is necessary to release the reset of GRSTz when 3 ms after both power supplies (VDD33 and VDD (1.1 V)) start up.
If a capacitor is connected between GRSTz and GND and the POR of the IC is used, it is necessary that VDD (1.1 V) has risen more than 10 μs before applying VDD 33.
When VDD33 rises before VDD (1.1 V), external reset control to GRSTz is necessary.
Best regards,
M. Tachibana
