Other Parts Discussed in Thread: DSI-TUNER
Hello,
I am trying to generate a test pattern with TI EVM (SN65DSI84) board and I am able to write to the I2C address correctly and read back the contents. I find that 0x0D (PLL_EN) bit is 0 even though I send the enable command 0x0D 0x01 after I start sending the MIPI video from my input board. I tried reading back the IRQ registers (0xE0, 0xE1 and oxE5), 0xE0 and 0xE1 are 0 but 0xE5 = 1 and it looks like the error points to PLL unlock. Can you guide me to fix this issue?I have attached two codes, one is initialize the CSR register after I put the MIPI in LP mode (aadvark_TI.xml file) and then after the MIPI clk and data are in HS mode, I send the PLL_EN.xml file to init the PLL and issue softreset.
/cfs-file/__key/communityserver-discussions-components-files/138/8546.7651.aadvark_5F00_TI.xml/cfs-file/__key/communityserver-discussions-components-files/138/4073.PLL_5F00_EN.xml
Thanks
Ranga
