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LMH0303: Does device require wait time when changing the Device ID from part to part ?

Kawai
Guru 19785 points
Part Number: LMH0303

Hi Team,

Please allow me to ask you about the Device ID programming for LMH0303, when used with several devices.

Does user needs to insert some wait time between access to LMH0303 #1 and LMH0303 #2, changing Device ID of REG 0x00 ?

I am understanding that LMH0303 has Device ID (Slave address) = 0x2E by default. User would need to use RSTI/RSTO pins to change each Device ID to unique value by writing REG 0x00.

When user Writes REG 0x00 of LMH0303 #1 to a unique Device ID, RSTO output will change to "High" automatically. Then, one could access to the next LMH0303 #2 using Device ID = 0x2E.

There should be some delay from REG 0x00 write and RSTO=high output. Could user keep writing under SMBus clock speed without wait time ?

.

Best Regards,

Kawai

  • 0
    TI__Guru* 93670 points
    Hi Kawai-San,

    I checked on this. Your understanding of the procedure to setup different SMBus address is correct.
    Given, SMBus maximum clock frequency is 100KHz, there are multiple clocks per SMBus operation, and there is 4.7uS of bus free time between consecutive SMBus operation, we do not expect to have a wait time requirement to setup the SMBus address for the next device.

    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    Guru 19785 points

    Hi Nasser-san,

    Thanks for the reply. Just in case, please allow me to double check.

    The wait time which I was thinking is during the following  3) and 4)

    1). Set LMH0303 #1 RSTI = High.

    2). Access LMH0303 #1 and write Register 0x00 = 0x02.

    3). Some time until LMH0303 #1 RSTO changes from Low to High.

    4). Some time until LMH0303 #2 will be ready.

    5). Access LMH0303 #2 and Write Regsiter 0x00 = 0x04.

    ...

    After writing REG 0x00 of #1, there should be some time which #1 RSTO changes from Low to High and #2 will be ready for SMBus access.

    During this step, there is only 4.7us bus free time regarding the SMBus timing requirement.

    Would it be enough ?

    Best Regards,

    Kawai

  • 0 in reply to Kawai
    TI__Guru* 93670 points
    Hi Kawai-San,

    Please note:
    1). Start hold time is 4uS. This means to start a new SMBus access start pulse should be at least 4uS.
    2). SMBus clock rate is at maximum100KHz or 10uS clock period. Data gets latched on the rising edge of the SMBus clock
    3). There needs to be at least 8 clock pulses for the whole data to get latched into LMH0303.
    So in summary, sum of these three time period are sufficient for device to latch in the data and respond with acknowledgement.

    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    Guru 19785 points
    Hi Nasser-san,

    I understood that for the device to LATCH the SMBus data it would need at least 9 clocks. Actually there should be 18 clocks ( Address+ACK+Data+ACK).

    I am not sure the delay time for the RSTO to change high, however, above would be enough for the device to be ready.

    As a conclusion, user would not need any wait time as long as he is based on SMBus spec.

    Thanks for the explanation.

    Best Regards,
    Kawai