Hi team,
I'd like to check if my understanding is correct about FC and BC's I2C drive, receiving circuit.
The following block diagram is in the datasheet.
In the line connected to external terminals SDA and SCL, there is a only drive circuit via FIFO and encoder decoder.
There is no receive circuit on the I2C line.
For example, how does Ack reply from a remote slave and so on are received?
Is this also on the forward channel packet, does it mean that there is no receiver circuit dedicated to I2C?
I would like to know if the driver and receiver of the block diagram are the same as reality.
Best regards,
Tomoaki Yoshida