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TLK110: Main Clock Interruption

Carolus Andrews
Mastermind 24245 points

Part Number: TLK110

Team,

I have a customer using TLK110 in MII mode with an external crystal. They have other designs (with different PHYs) that work in RMII mode with the 50 MHz clock generated by the FEC module. They had a bug where the 50 MHz clock was stopped during the boot process and it would sometimes cause the PHY to behave erratically. Does the TLK110 support having it's main clock interrupted when configured in RMII mode? They aren't planning to do this, but since the clock is generated by the CPU, it's possible that this happens, and we were hoping to clarify how the part would behave in this type of event..

 

  • 0
    TI__Mastermind 18425 points
    Hi Carlous,

    Interrupting the clock during normal operation violates the design requirements of the PHY. It would be difficult to describe all the effects that would occur since this is not a valid use case. Normal PHY operation getting affected by Ref Clock interruption does make sense. Our recommendation would be to ensure that such interruption does not happen.

    -Regards,
    Aniruddha