Hi team,
My customer has following question.
We were wondering if we take the TI XIO chip out of reset, how long must we wait before
we can access the configuration space registers?
We see in the datasheet Link training starts within 80ms,
but we do not see further information concerning when the PCIe bus interface
(and the device on the other side of the PCIe to PCI bridge) is ready for configuration
space access. Is there a requirement for this other than the 80ms?
I aloso culd not find the wait time in the datasheet.
Please let me know the asnwer.
Best regards,
Fumio Nakano
