DS90UB964-Q1: Why dose it happen the error of LP transition error?

Lian Wu

Part Number: DS90UB964-Q1

Dears:

The version of the chip is DS90UB964-Q1 A1, and refer the snls500's Code Example for Pattern Generator it will happen the error of LP transition error from CSIPHY.(Qualcomm 820A)

Is it concerned with CSI_CTL's Regs？Since using the different Regs, the error happens again.

Why dose it happen the error of LP transition error?

over 7 years ago

0 Steven(Shenzhen) Shi over 7 years ago

TI__Mastermind 30515 points

Luck,
you should check the CSI2 interface between UB964 and 820A chip, and the video format as well (are they matched)?
For UB964, you can set the CSI2 I/f by register CSI_CTL (0x33).

regards,
Steven

0 Lian Wu over 7 years ago in reply to Steven(Shenzhen) Shi

Genius 5250 points

Hi Junqiang:

We got the picture about the DATA Lane, and the signal is tested under the pattern generator Mode.

The default registers only enable pattern gen and there is no load at csi2, tx port.

Is there any issue at -34.2 us?

BTW, the below picture is the schematic, could you help check? Is there any issue about it?

U3 and other NC chips are not welded.

Ti964.pdf

0 Steven(Shenzhen) Shi over 7 years ago in reply to Lian Wu

TI__Mastermind 30515 points

Iian,

yes, it is normal. please see the figure in page19 of d/s, the transition from LP to HS is ~300ns ~ ~400ns.

regards,

Steven

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DS90UB964-Q1: Why dose it happen the error of LP transition error?