CCS/TLK110: TLK power down mode

Qi Li

Part Number: TLK110
Other Parts Discussed in Thread: TMS320F28379D,

Tool/software: Code Composer Studio

Hi,everyone.

Now I had designed hardware to communicate through EtherCAT. Now ET1100 is ESC, 24LC16 is EEPROM , TMS320F28379D is uc, TLK110 is PHY.

Now some registers of ET1100 can be read. And I want to initial PHY chip . The detail of TLK1110 is as belows:

Reset pin is connected to ET1100 and uc RESET Pin;

SW_STRAP is pulldown with 4.7k ohm.

INT/PWND is pulldown with 4,7k ohm and connected to GPIO of 28379D.

Now when power on , INT/PWND pin reaches 3.3 voltage .

PHYIDR1 and PHYIDR2 are read in ET1100 transparent mode . The value are 0x2000 and 0xA211.

SWSCR1-> 0x7DF2; SWSCR2->0x0002; SWSCR3->0x0003;

SWSCR1->0xFDF2. set bit15 1 to take the device out of powerdown mode. Then software will run into for loop to wait for PHY link .

Now I connect the net wire to the IPC which include Twincat.

But link LED and speed led have no response.

So I am trying to find the problem,Can you give me a hint to handle this problem?

Maybe I can access some registers to check the status of PHY .

Thanks in advance.

over 7 years ago

0 Geet Modi over 7 years ago

TI__Mastermind 26320 points

Hi,

You can refer to register 1 of TLK datasheet for status of the Phy.

Regards,
Geet

0 Qi Li over 7 years ago in reply to Geet Modi

Intellectual 420 points

Geet,
Thank you for your timely reply.
The value of regeister0 and register1 are 0x3100 and 0x7849.
It means the link is not estiblished.
Now I do not know how to do next? Can you give me a hand to detect some aspects of hardware or read some registers of software?

Richie.

0 Qi Li over 7 years ago in reply to Geet Modi

Intellectual 420 points

I need your help to establish the link between PHY and Ethercat master?

0 Geet Modi over 7 years ago in reply to Qi Li

TI__Mastermind 26320 points

Hi,

To help debug, I will need some more information. However if you are starting a new design, we recomend to use DP83822 which is next generation 100M Phy for real time ethernet application.

1. How is clock provided to Phy ? Is it available from before power-up or after power up?
2. Dump register 0 to 31 for both the phy which you are trying to link-up.
3. Share schematics of the board.

Regards,
Geet

0 Qi Li over 7 years ago in reply to Geet Modi

Intellectual 420 points

Geet,

Thank you very much for you suggestion about debug . I have solved the problems and PHY begins to work.
But I still have some questions to ask .

1\ Now we choose TLK 110 ,not DP83822 as PHY in the EtherCAT application. I have bought TMDSECATCNCD379D kit from Ti, of course ,the kit also use the DP83822. Is there more advantages using DP83822 than TLK110 as PHY? And why?
2\ Dump register 0 -31 for the phy . It is a must thing to do when I am trying to link?
3\ Auto negotiation of TLK110 can work after software reset. But It takes much time to wait Link status become active and LED is on.It is correct?
4\ I don not under stand ANLPAR reg bit [11] ASM_DIR and bit[10] PAUSE. Can you explain it to me?

Best Regards.
Richie.

0 Geet Modi over 7 years ago in reply to Qi Li

TI__Mastermind 26320 points

Hi Richie,

1. We strongly recommend using DP83822 as it's latest 100M part designed for real time applications.
2. Incase you get in issue, yes these register provides lot information about the Phy state.
3. Auto negotiation link-up time depends on how fast the two phy are able to converge on mulitple factors: MDI/MDI-X, capabilities etc.
4. Pause bits are used by MAC to initiate the PAUSE in case of overflow.

Regards,
Geet

0 Qi Li over 7 years ago in reply to Geet Modi

Intellectual 420 points

Geet,
Thank you very much for your reply. It is very clear.

Best Regards.
Richie

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CCS/TLK110: TLK power down mode