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Media Dependent interface connections: please confirm my understanding. I am using this device to operate in 100 Mbps mode. Therefore I will only use one receive and one transmit pair. I want to confirm that my default schematic connections are correct: Port A = PHY output/transmit, Port B = PHY input/receive, Ports C and D are unused. I came to this conclusion by referencing Figure 26 of the TI datasheet and researching the standard pin-out of the RJ-45 connector.
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When operating at 100 Mbps, channels C and D of the PHY will not be used. To keep channels C and D I/O in a known state, I plan to tie all four C/D MDI pins to ground, each through a 4.64k resistor. Is this in line with what TI recommends? I couldn’t find anything specific in the datasheet.
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If CLK_OUT is not used, can it be left as a no-connect?
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Aside from the PHY address strapping, all other strap settings can be controlled by software instead correct? I want to minimize external PHY strapping and let software configure the settings via MDC/MDIO. What about Autoneg Disable? The default Mode 1 state that requires no external strapping does not appear to be a valid mode for the RX_CTRL pin. If I do not strap anything to RX_CTRL (invalid mode for Autoneg Disable control), can software still access/control PHY auto-negotiation enable/disable?
