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TIOS101: What is Ip OUT pull-up/down current?

Noriyuki Takahashi
Genius 10250 points
Part Number: TIOS101
Other Parts Discussed in Thread: TIOL111,

Hi team,

Could you tell the definition of "Ip OUT pull-up/down current" in the datasheet?

I am not sure what it is. 

And why is this characteristics is not specified at TIOL111 datasheet?

Regards,

Noriyuki Takahashi

  • 0
    TI__Intellectual 2090 points
    Noriyuki-san,

    The Ip specification applies to the current output of the OUT pin while the driver is disabled (EN=low). The TIOS101 may be configured as a high-side driver (IN=low), or a low-side driver (IN=high). The datasheet specifies the maximum current from the OUT pin for either configuration when the output is high-Z.

    The TIOL111 analogue specification is CQ leakage current, which is specified for a range of voltage on the CQ pin when the driver is disabled.

    Does this help?

    Best Regards,
    Max Megee
  • 0 in reply to Max Megee
    TI__Intellectual 2090 points
    One other thing for clarification on the Ip specification:

    The TIOS101 device intentionally includes a current source or sink when the OUT pin is disabled. This keeps the output line biased to a state opposite its active state (high-side or low-side). This intentional current scheme is the reason for the higher current specification when the output is disabled, compared to the much lower current leakage for the TIOL111 device.
    Also, this means that the polarity of the OUT current will be dependent on the configuration of the device (IN = low/high).

    Please let me know if I can clarify anything further.

    Max
  • 0 in reply to Max Megee
    TI__Genius 10250 points
    Max,

    Thanks.
    But still not sure about your 2nd post.

    Could you clarify below your comments? I could not understand what you mean...
    "This keeps the output line biased to a state opposite its active state (high-side or low-side). This intentional current scheme is the reason for the higher current specification when the output is disabled, compared to the much lower current leakage for the TIOL111 device. "


    Regards,
    Noriyuki Takahashi
  • 0 in reply to Noriyuki Takahashi
    TI__Genius 10250 points
    Max,

    Let me give supplement for the above question. I would like to understand below.
    - Why the output line needs to be biased during Hi-Z?


    Regards,
    Noriyuki Takahashi
  • 0 in reply to Noriyuki Takahashi
    TI__Guru 62920 points
    Takahashi-san,

    I will try to help out while Max M. is out of the office.

    Since most digital sensor inputs operate by sensing the voltage on the line, it is useful to have defined voltage levels for both the "ON" and "OFF" states. The ON state voltage will be driven by the sensor (either high for a PNP output or low for an NPN output), but without any additional biasing the OFF state voltage would be undefined. Many applications use pull-up or pull-down resistors for off-state biasing, but a small degree of biasing has also been integrated into the TIOS101 device in case these resistances are not used.

    If you have further questions please let us know. Sorry for our delay in getting back to you.

    Regards,
    Max R.
  • 0 in reply to Miguel Robertson
    TI__Genius 10250 points
    Max,

    Thanks a lot!

    Regards,
    Noriyuki Takahashi