DP83867IR: MDIO being held low after reset on DP83867IR

K.Hamamoto

Guru 12155 points

Part Number: DP83867IR

I have a question which is related this thread.

As mentioned in e2e thread, GPIO_0 shall not be configured to Mode 4.

Is customer able to confirm the Voltage level on this pin is within range specified in datasheet to be in Mode 3 ?

What is the total time in supply ramp from first to last ( 3V3, 1V, 2V5, 1V8) ?

Best Regards,

Koji Hamamoto

over 7 years ago

0 Aniruddha Khadye over 7 years ago

TI__Mastermind 18425 points

Hi Koji,

Customer can measure the voltage on the pin and compare that to the voltage table listed in the strap section. Another way to confirm that the phy is strapped correctly is to read register 0x6E and 0x6F and verify that the strap modes match system requirements.

We do not spec the first supply to last supply time in the datasheet. However, if your last supply becomes stable within 100ms of the first supply ramp then it should be fine.

-Regards,
Aniruddha

0 K.Hamamoto over 7 years ago in reply to Aniruddha Khadye

Guru 12155 points

Hi Aniruddha,

Thank you.

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DP83867IR: MDIO being held low after reset on DP83867IR