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Original question:

DS125DF111: Register set up for locking to 6.25 Gbps input

DS125DF410: Register set up for "Standards based mode"

Kawai
Guru 19785 points

Part Number: DS125DF410
Other Parts Discussed in Thread: DS125DF111, SIGCONARCHITECT,

Hi Team,

From the description in the datasheet below,
I am understanding that the data rate shown in the standards based mode table does not require REG 0x60-0x64 PPM settings, only REG 0x2F setting is required for VCO setting. am I correct  ?

My understanding is that above "For other data rates" means the data rate which is not shown in the above table.

Below paragraph notes that REG 0x60-0x64 is required to be written when VCO0 and VCO1 needs different settings like 10GbE and 1GbE.

As long as only used in the bit rate which described in the standards based mode table, I believe user would not require PPM count and PPM count tolerance registers.

Could you please clarify ?

Best Regards,

Kawai

  • 0
    TI__Guru* 93570 points
    Hi Kawai-San,

    I believe your understanding is correct. As long as we are going to use standard data rates - as noted in table 2 - we need to use reg 0x2F only.

    Also, data sheet is correct in saying VCO0 and VCO1 need different settings like 10GbE and 1GbE. This is because 10GbE or 10.3125GbE and 1.25GbE are not integer multiple of one another. Therefor we need to use one VCO with divide by one to lock to 10.3125GbE and another VCO - 10GHz - so we can lock to divide by 8(1.25GbE).

    Regards,,,nasser
  • 0 in reply to Nasser Mohammadi
    Guru 19785 points
    Hi Nasser-san,

    Thanks for your comment.

    The background of this question was that my customer is observing CDR unlock when used in 6.25Gbps which is PROP3 in standards based mode. The device requires to program REG 0x6x PPM count / PPM count tolerance registers for normal operation. If they don't write this registers, the device would not correctly lock to 6.25Gbps.

    Would it be possible to test at your side if the device would correctly lock to 6.25Gbps with only programming REG 0x2F register for data rate setting ? They also programs CDR Reset assert and de-assert at the end of the script.

    * I only have DS125DF111 which does not have standards based mode. (Always require REG 0x6X registers.)

    Best Regards,
    Kawai
  • 0 in reply to Kawai
    TI__Guru* 93570 points
    Hi Kawai-San,

    I did try this and it worked fine.

    Please note there could be a SigconArchitect GUI problem involved here. If you go from high level to low level tab and change reg 0x2F to 0xA6 followed by reseting the device through reg 0x0A device may not lock. But if you turn off and on the device - while you are in low level page - and then change reg 0x2F to 0xA6 followed by reseting the device then the device locks fine. I also tried direct register access - without GUI - and this worked fine. I am not sure if your customer is using GUI or not.

    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    Guru 19785 points

    Hi Nasser-san,

    Thank you for the confirmation.

    Actually, customer is observing the problem programming from their MCU or FPGA directly to DS125DF410.
    I have checked their register procedure and did not see any mistake. However, the adaptive CTLE is choosing 2 types of value which is high gain (no error) or the lowest gain (this shows errors).
    There may be a problem that they are having test pattern until system link up, though this data rate is the same 6.25Gbps.

    By the way, could you please tell us all the known SigCon Architect GUI problem which you already know ?

    Best Regards,

    Kawai

  • 0 in reply to Kawai
    TI__Guru* 93570 points
    Hi Kawai-San,

    Please provide a block diagram of the overall application. In this diagram, please specify media insertion loss, return loss, or cross talk parameters. It would be good if we can get S4P file of the media. Based on this info., we could make some suggestion.

    Regards,,nasser