Hi team,
I realize that DOUT is constantly outputting anyway after PDB goes from Low to High.
Even if the output temporarily stops, such as when transferring from the internal clock to the back channel clock immediately after startup, we do not think that it will be in the state of high impedance.
Of course, it is assumed that the power supply and the PDB maintain the prescribed voltage.
Is it correct?
If there is a condition that DOUT+ and DOUT- become Hiz or fixed output all time, please let me know the conditions.
Best regards,
Tomoaki Yoshida
