DP83822H: Register setting

Hi Kenji,

There are no register settings because all PHY functions are done using hardware bootstraps.
Are you looking to match register readout or just want to know what operation the PHY is in?

Hi Ross,

Thank you for answering.
The value assumed in the bootstrap setting did not match when reading the register setting.
Then, let me know the PHY register setting (reading value) with TIDA - 00299 design.

Best Regards,
Kenji

Hi Kenji,

Please send me the register dump for your board.
I would like to know register dump for 0x0 to 0x1F as well as 0x467 and 0x468.
For 0x467/8 please use extended register access:

setps to take for extended access

1. write 0x1F to register 0xD
2. write 0x467 to register 0xE
3. write 0x401F to register 0xD
4. read register 0xE (value in 0xE is the value in 0x467)

Also, please send me your schematic.

Hi Kenji,

Any update here?

Hi Ross,

Sorry, I do not have any updates yet.
I will contact you again after confirming, please wait a little more.

Best Regards,
Kenji

Hi Ross,

I will inform you about the update information.

PHY 0 (EtherCAT IN side):
PHY 1 (EtherCAT OUT side):

Register reading
PHY 0 PHY 1
0x467 0C83h 3083h
0x468 0000h 0000h

Register dump for 0x0 to 0x1F information directly wish to contact you.
Please tell me your e-mail address.

Best Regards,
Kenji