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DS90UB953-Q1: GPIO output status of 953 using BC GPIO if 954 happen reset

Tomoaki Yoshida91
Genius 5255 points
Part Number: DS90UB953-Q1

Hi team,

Our customers use 953-954 back channel GPIOs to output to 953 local GPIOs.

It is assumed that a reset to 954 will occur during communication.

In this case, what is the status of the local GPIO output of 953?

Whether the output just before 954 is reset is held or the GPIO output of 953 is reset and will be Low?

Best regards,

Tomoaki Yoshida

  • 0
    TI__Expert 4555 points
    Yoshida-san,

    By "it is assumed that a reset to 954 will occur during communication", do you mean that you expect there to possible be an accidental reset, or do you mean that you are controlling this manually either via the PDB pin or the Digital Reset Registers (0x01).

    If the reset is done via the PDB pin or setting Bit 1 of Address 0x01, all registers (including GPIO signals) will be reset to the default value. You can also do a digital reset that does not return the register values to default. You can do this by setting Bit 0 of Address 0x01.

    Best Regards,
    Jonny
  • 0 in reply to Jonathan Nguyen
    Genius 5255 points

    Hi Jonny-san,

    Thank you for your support.
    It is assumed both cases.
    The 954 board may syut down independently of 953 board.
    In this case, FPD-LINK communication is also lost.

    954 may be refleshed with reset register.

    I would like to know the both cases.


    Best regards,
    Tomoaki Yoshida