DS90UB913A-Q1: I2C command needs extra delay time

[FAE] Andrew Wang

Genius 10685 points

Part Number: DS90UB913A-Q1

Hi Team,

Customer met a I2C command delay problem, please kindly check, thanks.

Background info:

DS90UB913A GPO1 pin connect to image sensor reset pin and EEPROM write protect (WP) pin at same time.

image senor reset pin is active low.

EEPROM WP pin is active high.

For normal use, GPO1 pin set to High:

whenever want to reset image senor or write something to EEPROM，set GPO1 pin to Low

913A GPO1 pin default = output high

Condition 1: (When 913A PCLK, parallel data, VS, HS has no input)

Customer set 913A GPO1 pin = low (reset image sensor), after 130 us , send command to control 913A I2C output, 913A I2C react to the command correctly.

Condition 2: (When 913A PCLK, parallel data, VS, HS has input)

913A GPO1 pin set to low (reset image sensor), at mean time 913A PCLK, parallel data, VS, HS has no input, after 130 us , send command to control 913A I2C output, 913A I2C will remain high, and no response to the command.

If customer wait another 10ms and set 913A GPO1 pin to low，this time the I2C command will work.

Customer wants to know what cause the delay for condition 2, why needs to wait for 10ms to make I2C response correctly, thanks.

Andrew

over 7 years ago

0 Steven(Shenzhen) Shi over 7 years ago

TI__Mastermind 30515 points

The link between UB913a and UB914a/UB934/UB96x should have "ready" time for communication. For the first case, the link has no input so the ser. UB913a use internal oscillator to link communication (including I2C), the response is fast. but for the second case, as you change the input status, so the ser UB913a internal clocking is changing as well, it needs take more time (dozens of ms) to monitor and lock dependent on the system design.

regards,

Steven

0 [FAE] Andrew Wang over 7 years ago in reply to Steven(Shenzhen) Shi

TI__Genius 10685 points

Hi Steven,

Thank you!
Customer following question, where can we find 'ready time spec' in our datasheet?
Thanks!

Andrew

0 Steven(Shenzhen) Shi over 7 years ago in reply to [FAE] Andrew Wang

TI__Mastermind 30515 points

please see ub913a d/s page13. for any pll, it has lock time, but this is also dependent on the power stable, input clock stability, freq. jump, etc. the typical is dozens of ms for one stable high speed link after power-on. this is experience.

regards,
Steven

0 [FAE] Andrew Wang over 7 years ago in reply to Steven(Shenzhen) Shi

TI__Genius 10685 points

Hi Steven,

Thanks.
Customer found in page13, the TPLD MAX is 2ms in our datasheet, but RnD is wondering is this PCLK lock time already include internal oscillator lock time? If they are different, what is sufficient time to wait in total?
100mS is long enough, can we guarantee?
Thanks.

Andrew

0 Steven(Shenzhen) Shi over 7 years ago in reply to [FAE] Andrew Wang

TI__Mastermind 30515 points

Andrew, as I mentioned, dozens of ms is ok.

regards,
Steven

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DS90UB913A-Q1: I2C command needs extra delay time