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RS485 Common-mode Bench Test Method

Hi team,

  As we all know in typical RS485 long distance communication, there'll be high common-mode voltage in both sides. If we want to simulate the situation in the bench, what method/process does TI usually do? Thanks.

Regards,

Patrick

  • Hi Patrick,

    Good question!

    The common mode differences in RS-485 arise from different transceivers using different ground references (due to distance between nodes). These ground offsets couple through the transceivers to the bus (either strongly when the driver is active, or weakly when the nodes are in receive mode), creating a common mode offset on the RS-485 signal lines.

    A typical way of simulating this behavior in the lab is to model the different RS-485 transceivers on a bus as resistances. Per the RS-485 standard, a "unit load" is defined as a leakage current/voltage characteristic that receivers must remain within. You can read more about it in this blog:

    e2e.ti.com/.../rs-485-basics-how-to-calculate-unit-loads-and-the-maximum-number-of-nodes-on-your-network

    To simplify this as a resistance, though, you could look at the limiting values of the I/V characteristic (1 mA of input current for +12 V applied voltage) and compute a resistance of 12 V / 1 mA = 12 kOhm.

    An RS-485 bus can have at most 32 unit loads, so the worst-case loading would correspond to 32 of these resistances in parallel. This gives an effective common-mode load resistance of 12 kOhm / 32 = 375 Ohms.

    A worst-case scenario would be to assume that every other transceiver on a network besides the DUT is biased to a separate ground. This offset ground can be modeled as a voltage source, and that voltage source can be applied to the A/B signal lines via the 375 Ohm resistance we computed above. If you look at the blog I linked above, it has a schematic of the test circuit. The same test circuit should appear in most RS-485 transceiver datasheets.

    Note that our RS-485 EVM also allows for common mode voltages to be forced onto a header pin to be able to test the performance of our devices across common mode variation. These common-mode injection pins couple to the bus via series resistances modeling the leakage characteristics of a fully loaded RS-485 network.

    I hope this is all clear, and if you have any further questions please let me know.

    Regards,
    Max