DS90UH947-Q1: LVDS signal output from SOC to DS90UH947-Q1.

Apollo Chen79

Part Number: DS90UH947-Q1

Dear support team:

My hardware configuration is to connect the LVDS signal directly to DS90UH947. Deserializer is DS90UH948, but panel has no display. Our pixel clock from SOC is "87Mhz" and the resolution is "1280x720". I originally thought that the resolution is not correct, resulting in no screen display. But when I measure the "LOCK" pin of DS90UH948, the level is Low. Do you have any suggestions about LVDS and DS90UH947?

By the way, does DS90UB947 need to define parameter in Device tree when I’m using Yocto (linux-4.14.35)? Could you please provide some reference documents for us to test it if additional settings are required?

Best regards,

Apollo Chen

over 7 years ago

0 Steven(Shenzhen) Shi over 7 years ago

TI__Mastermind 30515 points

Apollo,
from your issue symptom, it sounds the UB948 is NOT locked. so please:
Can you run UB947's pattern gen.? which is use to identify whether the link between UB947 and UB948 is correct or not.
if it is failed, please check your pattern gen. setting (TI has app. note on pattern gen. setting in UB947 d/s), or the connector / cable issue?
if it is passed, pls check the UB947 power supply, I/f between SoC and UB947 etc.

best regards,
Steven

0 Apollo Chen79 over 7 years ago in reply to Steven(Shenzhen) Shi

Prodigy 95 points

Hi Steven,

It can now display the screen normally when I remove the ESD component from the DOUT. I think I should believe that the schematic from user's guide (ds90uh947_EVMsnlu140a.pdf). And also thanks for your advice.

Our board:

EVM:

Best regards,

Apollo

0 Steven(Shenzhen) Shi over 7 years ago in reply to Apollo Chen79

TI__Mastermind 30515 points

Apollo,
the ESD diode is attached in the high speed signal, you should select the device with very load parasitic cap, which can't impact the high speed signal.

regards,
Steven

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DS90UH947-Q1: LVDS signal output from SOC to DS90UH947-Q1.