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DP83848K: EMI guidelines

Vincenzo Pizzolante
Mastermind 25376 points
Part Number: DP83848K
Other Parts Discussed in Thread: DP83822I

hi

a customer of mine is designing w/ DP83848K in RMII mode, clock input @ 50MHz.

could you point me out to some specific EMI guidelines for a 2 layers PCB (if ever possible)?

I found the snla079d

thanks a lot in advance

KR

Vincenzo

  • 0
    TI__Mastermind 18425 points
    Hi Vincenzo,

    Is this a new 10/100Mbps project? Has the customer reviewed DP83822I. It is our latest 10/100Mbps ethernet PHY for Industrial application. It also has EMI optimzed reference design: www.ti.com/.../TIDA-00928

    As for suggestion for DP83848K design, the application note that you mentioned covers the EMI guidelines as well. The impedance of RMII traces should be 50ohms single ended and there should be no break in the return plane beneath the RMII traces. Termination resistors should be added on the RMII traces. For MDI, the impedance should be kept at 100ohms differential. Follow the guidelines for magnetics selection and power supply decoupling.

    -Regards,
    Aniruddha